ZL40230,ZL40235,ZL40240
miSmartBuffer Clock Fan-Out Buffers
Overview
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Microsemi’s miSmartBuffer ZL40230/235/240 Family of devices give the ability to create multiple copies of a clock signal and distribute them among several loads with minimal additive jitter. The miSmartBuffer ZL40230/235/240 family of devices are synergistic with Microsemi® industry-leading timing portfolio and when combined can create a complete clock tree, replacing a number of multipliers, synthesizers, and oscillators on the board, improving design reliability while reducing BOM costs and simplifying design. |
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ZL40230 - Low Skew, Low Additive Jitter 10 output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output
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ZL40235- Low Skew, Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output
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ZL40240 - Ten LVCMOS Output Low Additive Jitter Fanout Buffer
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Applications/Uses
- Clock signal fanout, format conversion, frequency division and skew adjustment in a wide variety of equipment types including Processors, NPUs, FPGAs, 10G CDRs, high-speed ADCs and DACs, PCI Express generation 1/2/3 clock distribution, Ethernet switches and PHYs, Clock and data signal restoration, Logic translation
- Clock trees for optical, Wireless, High performance microprocessor clock distribution OTN, SONET,/SDH, WDM, storage, networking and broadcast video applications
Resources
ZL40230-31-34-35-40-41-60 IBIS ModelsParametric Search
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