ZL30255
Dual-Channel Any-to-Any Clock Multiplier and Jitter Attenuator
Overview
| The ZL30255 is a flexible, high-performance, clock multiplier/jitter attenuator IC. From any input clock frequency 1kHz to 1250MHz this device can produce frequency-locked output frequencies from <1Hz to 1035MHz and as many as 6 differential or 12 CMOS output clock signals. Output jitter is typically 0.16 to 0.28ps RMS (12kHz to 20MHz). Automatic self-configuration from internal EEPROM allows clock signals to be available immediately after power-up or reset. |
Applications/Uses
- Clocks for Processors, NPUs, FPGAs, 10G CDRs, high-speed ADCs and DACs, PCIe interface devices, Ethernet switches and PHYs
- Clock generation for wireless base stations, wireless backhaul, wired infrastructure, SONET/SDH, GE, 10G/40G/100G Ethernet, optical, storage, and broadcast video applications
Key Features
- Two Independent Channels
- Three Input Clocks Per Channel
- Two Differential/CMOS inputs
- One single-ended/CMOS input
- Any input frequency from 1kHz to 1250MHz (1kHz to 300MHz for CMOS)
- Inputs continually monitored for activity and frequency accuracy
- Automatic or manual reference switching
- Low-Bandwidth DPLL Per Channel
- Programmable bandwidth, 14Hz to 500Hz
- Attenuates jitter up to several UI
- Freerun or digital hold on loss of all inputs
- Digitally controlled phase adjust
- Low-Jitter Fractional-N APLL and 3 Outputs per Channel
- Any Output Frequency from <1Hz to 1035MHz
- High-resolution fractional frequency conversion with 0ppm error
- Easy-to-configure, encapsulated design requires no external VCXO or loop filter components
- Each output has independent dividers
- Output Jitter Typically 0.16 to 0.28ps RMS (12kHz to 20MHz integration band)
- Outputs are CML or 2xCMOS, can interface to LVDS, LVPECL, HSTL, SSTL and HCSL
- In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz)
- Per-output supply pin with CMOS output voltages from 1.5V to 3.3V
- Precise output alignment circuitry and per-output phase adjustment
- Per-output enable/disable and glitchless start/stop (stop high or low)
General Features
- Automatic self-configuration at power-up from internal EEPROM; up to four configurations per channel, pin-selectable
- Numerically controlled oscillator mode
- Spread-spectrum modulation mode
- SPI or I2C processor Interface
- Tiny 5x10mm LGA package
- Easy-to-use evaluation software
- Each channel of the ZL30255 can be ordered with up to four user-defined, factory-programmed device configurations
Resources
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Ordering
Programmable PLL Clock Multiplier/Attenuator Dual 0.000001MHz to 1035MHz 64-Pin LGA T/R
| Distributor | SKU | Stock | MOQ | Pkg | |
|---|---|---|---|---|---|
| Microchip Technology Inc. | .. | .. | .. | .. | Buy Now |
| Digi-Key | ZL30255LFF7-ND | 4000 | Tape & Reel | No Stock |
Clock Generator 0.001MHz to 1.25GHz Input 1035MHz Output 4Clock Inputs 64-Pin LGA EP Tray
| Distributor | SKU | Stock | MOQ | Pkg | |
|---|---|---|---|---|---|
| Microchip Technology Inc. | .. | .. | .. | .. | Buy Now |
| Digi-Key | ZL30255LFG7-ND | 294 | Tray | No Stock | |
| Future Electronics | 5074420 | 294 | Tray | No Stock | |
| Future Electronics | 5074420 | 294 | Tray | No Stock |
