ZL40224,ZL40225
ZL40224 Precision 2:8 LVPECL Fanout Buffer with Simple Input Reference Switching
Overview
The ZL40224/ZL40225 are LVPECL clock fanout buffers with two inputs and eight identical output clock drivers capable of operating at frequencies up to 750MHz. Inputs to the ZL40224 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40224 can accept DC or AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. The ZL40225 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40225 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals.
The ZL40224/ ZL40225 are designed to fanout low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.
Applications/Uses
- Low jitter clock distribution
- Level translation
- Clock and data signal restoration
- Redundant clock distribution
- Wired communications: OTN, SONET/SDH, GE, 10 GE, FC and 10G FC
- Wireless communications
- High performance micro-processor clock distribution
Key Features
- Accepts two differential or single-ended input
- Simple switching of references
- 8 precision LVPECL outputs
- Maximum operating frequency of 750 MHz
- 2.5 V or 3.3 V power supply
- Additive jitter less than 136 fs RMS for fc = 125 MHz
- Additive jitter less than 34 fs RMS for fc = 750 MHz
- On-chip input termination resistors and biasing for AC coupled inputs
- Industrial temperature range: -40°C to +85°C
- On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
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