ZL30622
Single Channel Ultra Low Jitter Network Synchronizer
Overview
The ZL30622 is a fully compliant SEC (G.813) and EEC (G.8262) single channel Network Synchronizer with ultra-low jitter performance of 250fs RMS. ZL30622 comes in a tiny 5 x 5mm QFN package and is pin compatible with the ZL30151 line card PLL. The device accepts up to 3 input references and generates up to 3 differential or 6 single-ended CMOS output clocks . An integrated digital phase locked loop (DPLL) with programmable loop bandwidth from 0.1Hz to 500Hz provides G.8262 compliance including hitless reference switching, holdover and jitter filtering. An integrated fractional-N analog PLL (APLL) generates ultra-low jitter output clocks programmable to any frequency between <1Hz to 1035MHz.
Key Features
- Input Clocks
- Three inputs, two differential/CMOS, one CMOS
- Any input frequency from 8kHz to 1250MHz (8kHz to 300MHz for CMOS)
- Per input activity and frequency monitoring
- Automatic or manual reference switching
- Low Bandwidth DPLL
- ITU-T G.813/G.8262 compliance (options 1 & 2
- Programmable bandwidth, 0.1Hz to 500Hz
- Attenuates jitter up to several UI
- Free run or holdover on loss of all inputs
- Hitless Reference Switching
- High-resolution holdover averaging
- Digitally controlled phase adjustment
- Low-Jitter Fractional-N APLL and 3 Outputs
- Any output frequency from <1Hz to 1035MHz
- High resolution fractional frequency conversion with 0ppm error
- Encapsulated design requires no external VCXO or loop filter components
- Output jitter as low as 0.25ps RMS (12kHz - 20MHz integration band)
- Each output is CML or 2 x CMOS, can interface to LVDS, LVPECL, HSTL, SSTL and HCSL
- In 2 x CMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz)
- Per-output supply pin with CMOS output voltages from 1.5V to 3.3V
- Precise output alignment circuitry and per-output phase adjustment
- Per-output enable/disable and glitchless start/stop (stop high or low)
- General Features
- Automatic self-configuration at power-up from internal EEPROM: up to four pin selectable configurations
- Numerically controlled oscillator mode
- Input-to-output phase alignment with external feedback
- SPI or I2C processor interface
- Easy-to-use evaluation software
- 32 pin 5 x 5mm QFN package
Resources
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Ordering
ZL30622 Series 1.035 GHz 3-Input 3-Output Any-to-Any Frequency Timing Card PLL
| Distributor | SKU | Stock | MOQ | Pkg | |
|---|---|---|---|---|---|
| DigiKey | ZL30622LDG1-ND | .. | Tray | No Stock |
