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Security Forum 2017 on 03.01.2017 - 03.01.2017  at Crystal City Marriott

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Overview

Security Forum 2017 | Microsemi


Microsemi®Security Forum 2017

Crystal City Marriott at Reagan National Airport

Wednesday, March 1, 2017 – 8:30 a.m. – 7:00 p.m.

You are cordially invited to attend the Microsemi Security Forum on Wednesday, March 1, 2017 at Crystal City Marriott at Reagan National Airport. This one-day highly informative forum is focused on technology needed to secure critical infrastructure, Microsemi security experts will provide an in-depth overview of the company's latest and most innovative anti-tamper and cyber security technologies, products and solutions. These include the company's most advanced secure FPGAs and SoC FPGAs, cryptographically secure Ethernet and Storage products, and GPS security solutions. This technical, non-classified Microsemi Security Forum will feature technical product presentations and demonstrations, a keynote presentation from the company's chief technology officer (CTO), several opportunities for interactive Q&A sessions, and an outstanding opportunity to network with others in the related fields. Continental breakfast and lunch will be served with advanced reservations.

Date: Wednesday, March 1, 2017
Time: 8:30 a.m. to 7:00 p.m. (Registration opens at 7:30 a.m.)
Where:  Crystal City Marriott at Reagan National Airport

1999 Jefferson Davis Hwy, Arlington, VA 22202
Crystal City Marriott Phone: (703) 413-5500










Space is limited, please register now at Security Forum Registration website: http://www.microsemi.com/microsemi-security-forum

For questions, please contact: SecurityForum@Microsemi.com.

About Microsemi's Security Solutions Portfolio:

Microsemi is a leading provider of information assurance (IA) and anti-tamper (AT) solutions and services to U.S. federal organizations, systems integrators and industries requiring a high level of electronic security including financial, digital rights management, gaming, industrial automation and medical. The company leverages its proven hardware and software IA/AT technologies, innovative cryptographically-secure supply chain risk management process, and extensive industry experience to secure critical program information and technology through the entire system lifecycle. In addition, Microsemi provides secure synchronous time generating systems, secured Ethernet connectivity, controller-based data encryption for data protection and security solutions in data centers, comprehensive IA/AT services such as risk assessments, protection development and red teaming to satisfy security requirements. For more information on Microsemi's security products and technologies, visit http://www.microsemi.com/design-support/security-technology and for more information on Microsemi's product portfolio, visit http://www.microsemi.com/products/.

Agenda

Time

Topic

Presenter

7:30–8:30

Check-in, On-site Registration, and Breakfast

  

8:30–8:45

Welcome and Agenda Overview

 {popup href="#john" rel="{size:{x:400,y:300}}"}John Costello{/popup}

8:45–9:45

PolarFire FPGA - Industries Most Secure FPGA with
embedded Cryptographic Engine

 {popup href="#tim" rel="{size:{x:400,y:300}}"}Tim Morin{/popup}

9:45–10:30

PolarFire SoC Roadmap – Extending Security to embedded
Processors

 {popup href="#tim" rel="{size:{x:400,y:300}}"}Tim Morin{/popup}

10:30–10:45

Break

 

10:45–11:30

Microsemi FPGA Security Implementation

 {popup href="#richard" rel="{size:{x:400,y:300}}"}Richard Newell{/popup}

11:30–12:15

SRAM and Buskeeper PUFs in Polarfire

 {popup href="#pim" rel="{size:{x:400,y:300}}"}
Pim Tuyls (Intrinsic ID)
{/popup}

12:15-1:00

Microsemi Executive Briefing (Lunch)

 {popup href="#jim" rel="{size:{x:400,y:300}}"}Jim Aralis{/popup}

1:15-2:00

Introduction to the Athena TeraFire® EXP-F5200B Cryptography Microprocessor on PolarFire FPGAs

 {popup href="#jon" rel="{size:{x:400,y:300}}"}Jon Mellot
(Athena Group) {/popup}

2:00-2:45

MACSec Encryption for Securing Ethernet Networks

 {popup href="#brian" rel="{size:{x:400,y:300}}"}Brian Jaroszewski{/popup}

2:45–3:15

Break

  

3:15-3:45

Data Center Security

 {popup href="#radjendirane" rel="{size:{x:400,y:300}}"} Radjendirane Codandaramane{/popup}

3:45–4:30

Securing the SSDs - NVMe Controller Encryption

 {popup href="#radjendirane" rel="{size:{x:400,y:300}}"} Radjendirane Codandaramane{/popup}

4:30-5:30

Assured Timing in GPS Denied Environments

 {popup href="#richardf" rel="{size:{x:400,y:300}}"}Richard Foster {/popup}

5:30–6:00

Wrap-up

 General Attendance

6:00-7:00

Reception

  
     

Pim Tuyls

CEO and co-founder of Intrinsic ID

Dr. Pim Tuyls is CEO and co-founder of Intrinsic ID, the world's leading provider of digital authentication based on Physical Unclonable Functions. A pioneer and leading authority in the field of Physical Unclonable Functions, he holds more than 30 patents, has published more than 50 papers and is a regular speaker at international conferences. He received his Ph.D at the Katholieke University of Leuven in 1997.

John Costello

Corporate Vice President of Business Development & Government Relations for Security and Defense

John Costello is the corporate vice president of business development and Government Relations, Security & Defense. John has 30 years of experience in the high reliability world and leads Microsemi’s security and defense teams. His responsibilities include development of global market strategies and government relations. Prior to taking the vice president of Business Development role, John served as vice president of High Reliability Worldwide Sales from 2004 to 2011.

Tim Morin

Director of Strategic Marketing, Systems on Chip Products Group

Tim Morin has over 30 years experience in marketing, engineering, and sales, including 10 years at Microsemi in various roles. These include Director of Product Marketing, Director of Strategic Marketing, and Senior Product Planning Manager for SmartFusion, and SmartFusion2. Tim also had 12 years at Atmel Corporation in various roles including, Director of Marketing ARM Standard Product for the Americas, Director of Business Development ASIC/ASSP Business Unit, Business Development Manager ASIC/ASSP Business Unit, and Field Applications Engineering. Tim spent 9 Years at Texas Instruments Defense Systems And Electronics Group working as an Electrical Design Engineer and Hardware, software, and algorthim development for Airborne Forward Looking Infrared Systems. Image Fusion, Automatic Target Tracking, Area Processing, Electronic Image Stabilization. Tim graduated from Purdue University 1985 with a BS in EET.

 

Richard Newell

Senior Principal Product Architect

Richard Newell serves as senior principal product architect at Microsemi and plays a key role in planning the security features for the current and future generations of flash-based FPGAs and SoC FPGAs. Richard has an electrical engineering background with experience in analog and digital signal processing, cryptography, control systems, inertial sensors and systems, and FPGAs. He is an alumnus of the University of Iowa. Richard is the recipient of approximately one dozen U.S. patents, and is a member of the Tau Beta Pi and Eta Kappa Nu honorary engineering societies.

Jim Aralis

Chief Technology Officer and Vice President of Advanced Development

Jim Aralis joined Microsemi in January of 2007, where he serves as chief technology officer and as vice president of advanced development.  Aralis has spent more than 35 years in the development of analog, digital, and mixed signal integrated circuits, systems, and software/firmware. He has also contributed to the development of custom analog device and process technologies and CAD systems. 

Prior to joining Microsemi, Aralis started, staffed, and managed the Maxim Integrated Products design center in Irvine, Calif., which designed physical layer ICs for fiber optic communications. He also managed an AFE design team designing high performance disk drive read channels for TI/SSi. In addition, Aralis worked on the design and design management of analog and digital integrated circuits for Hughes Aircraft Company.

Mr. Aralis received Bachelor of Science degree in Math Applied Science and Physics and a Master of Science in Electrical Engineering from UCLA. He holds numerous patents and publications.

Jon Mellott

CTO of Athena Group

Jon Mellott is CTO of The Athena Group, a leading provider of security, cryptography, anti-tamper, and signal processing IP cores to many of the world’s largest semiconductor companies, defense contractors, and OEMs, as well as emerging providers. Embedded in millions of ASIC and FPGA devices, Athena technologies enable high-value solutions where security and performance are mission critical: defense and aerospace, vehicle safety (V2V, V2X, telematics), networking and communications, satellites, cellular base stations, and more. Since 1993, Jon has played a vital role in architecting and bringing Athena’s advanced security technologies to market. Jon holds a Ph.D. in Electrical Engineering from the University of Florida.

Brian Jaroszewski

Senior Manager, Ethernet and Networking Technologies Product Marketing

Brian Jaroszewski, Senior Manager, Product Marketing for Ethernet Networking Technologies (ENT) BU at Microsemi Corporation, has over fifteen years experience in the communications and semiconductor industries. Brian holds a Bachelor of Science degree in computer and electrical engineering from Purdue University and an MBA from London Business School.  Prior to his MBA, Brian spent more than four years at AMD in the field sales organization.

Radjendirane Codandaramane

Manager Applications, Performance Storage

Radj Codandaramane is Manager, Applications Engineering for FlashtecTM  PCIe SSD Controllers and NVRAM Drives in the Performance Solutions Business Unit (PSBU) of Microsemi Corporation. Radj has been in the Enterprise Storage Industry for the la st 15 years and has been the in-house Security Expert consulting the development of FIPS 140-2 Compliant Storage Protocol Controllers. He has helped out customers designing FIPS 140-2 compliant Enterprise Storage products using Microsemi’s Tachyon Fibre Channel, SAS Protocol Controllers.

Dr. Richard Foster

Sr. Business Development Manager, Microsemi Government Systems

Dr. Foster has 27 years of engineering and business development experience, covering government, defense, and aerospace markets, with airborne, ground-based, maritime, and space-based applications. He joined Microsemi in 2012, and currently serves as the Sr. Business Development Manager for the Government Systems business, which is part of the company’s Frequency and Time Division. Dr. Foster earned his doctoral degree in Mechanical and Aerospace Engineering in 1998, an M.E. in Mechanical and Aerospace Engineering in 1986, and a B.S in Nuclear Engineering in 1984, all from the University of Virginia. Prior to his current position with Microsemi, he worked at Ball Aerospace and Technologies Corporation for 11 years, eight years at Science Applications International Corporation, and five years at the University of Virginia.

*Microsemi reserve the rights to revise or modify the Security Forum agenda at its sole discretion.

Abstracts

PolarFire FPGA

PolarFire SoC

Microsemi FPGA Security Implementation

In this session Richard will present the design and data security features of the PolarFire™ FPGA family and associated configuration tools.  The design security features protect the user and third-party design IP used to configure the FPGA, including the industry’s most secure key management scheme for bitstream keys.  Anti-tamper features, some new to the PolarFire FPGA family, protect the FPGA from various side channel and physical attacks.  The data security features allow the user to store keys securely, enroll the device in user security schemes, and perform a multitude of cryptographic operations securely with virtually no side channel leakage.

SRAM and Buskeeper PUFs in Polarfire

SRAM- and Buskeeper-based PUFs are the best approaches to creating root keys inside chips. In this talk we focus on the implementation of these PUFs in Microsemi's next Polarfire FPGA. By using an appropriate implementation of Intrinsic ID’s QUIDDIKEY product, the SRAM and Buskeeper PUF responses are turned into a reliable and highly secure root key on the Polarfire FPGAs without being stored. Keys derived from the root key are then used to wrap and manage other keys and create an FPGA without permanent secrets. Based on measurement data we will show that the SRAM and Buskeeper PUFs in the Polarfire FPGA behave very reliably under a wide variety of temperatures (from -55C to 135C). With the same data, we will also show that they offer a high level of uniqueness, providing the Polarfire FPGA with invisible root keys.

Introduction to the Athena TeraFire® EXP-F5200B Cryptography Microprocessor on PolarFire FPGAs

The Microsemi PolarFire FPGA is offered with an Athena TeraFire EXP-F5200B cryptography microprocessor provided as hard IP on the device. The EXP-F5200B provides a comprehensive suite of cryptographic algorithms, including complete support for the Commercial National Security Algorithm (CNSA) Suite and beyond, and also includes side-channel (SCA) resistant cryptography using proprietary, patent pending leakage reduction countermeasures. These countermeasures provide strong resistance against SCA attacks such as differential power analysis (DPA) and simple power analysis (SPA). This presentation will describe the EXP-F5200B’s cryptographic algorithm support, SCA countermeasures, NIST CAVP certifications, ability to execute future algorithms, system integration considerations, and benefits provided by this groundbreaking combination of Athena’s flagship security technology with the Microsemi PolarFire FPGA.

MACSec Encryption for Securing Ethernet Networks

As the number of network connections increases, so does the network’s vulnerabilities. Because hackers can target anything with an IP address, these security risks rise even more when devices are networked. This talk will focus on how networking equipment can take advantage of strong encryption to improve data confidentiality in Ethernet networks.

The good news is that Ethernet has its own security protocol: namely, IEEE 802.1AE MACsec, along with KeySec (now part of 802.1X) for key management. Specifically designed to secure Ethernet networks, MACsec offers a scalable, highly efficient means to secure network links directly at Layer 2. Apart from being less expensive and lower power compared to IPsec, Microsemi’s MACsec implementation (Intellisec™) expands the standard capabilities by facilitating both link-by-link encryption and encryption at the edge of the networks, enabling end-to-end security. Intellisec also supports multiple, individually encrypted, connections out of a single WAN-facing port to a multitude of other end points and (cloud) services, purely based on a PHY implementation.

Securing the SSDs - NVMe Controller Encryption

Protecting the stored user data from unauthorized access is becoming a prevalent function in the disk drives, whether be it HDD or SSD. This presentation covers what security features need to be implemented in a NVMe controller and how to design for getting FIPS certification.

Data Center & Cloud Security

Assured Timing in GPS Denied Environments