Gigabit Ethernet PHY Cores
Gigabit Ethernet PHY Intellectual Property
Ethernet is the most broadly deployed networking technology in the world. Cisco's Visual Networking Index projected global Internet traffic to quadruple from 2010 to 2015. Of that, video is expected to exceed 60% of all consumer Internet traffic by 2015. Given the demand for connectivity, Ethernet has become pervasive, finding applications anywhere from appliances, digital televisions, home theater equipment, and game consoles to printers, network-attached storage, and other electronic applications.
Microsemi's portfolio of Gigabit Ethernet (GE) Intellectual Property (IP) cores simplify integration of 10/100/1000BASE-T functionality into Ethernet IC solutions for consumer electronics, broadband access, network security, printer, smart grid, storage, and more.
With energy efficiency mandates such as IEEE 802.3az Energy Efficient Ethernet (EEE), low power is critical for new Ethernet products. Microsemi's GE PHY cores deliver industry-leading power dissipation below 390 mW per port and feature Microsemi's EcoEthernet™ 2.0 power saving technology. EcoEthernet includes fully compliant IEEE 802.3az EEE that can reduce power by up to 80% in idle mode. Additionally, an ActiPHY™ enabled mode reduces power by over 75% for ports with no link.
The GE PHY cores cores are based on a power-efficient voltage-mode architecture with integrated line side resistors and low-EMI line drivers that provide extra margin for meeting residential emission standards. Their cable impairment active correction technology and robust DSP capabilities filter out cable noise and support remote cable diagnostics functionality.
Carrier Ethernet (CE) versions of each core are also available. The CE versions offer multiple recovered clock outputs and fast link failover support ideal for use in G.8261 Synchronous Ethernet applications.
The hard macros, each fully routed designs that can improve time-to-market and reduce project risk, are provided with encrypted Verilog models; LVS netlist, GDS-II, and frame view LEF files; timing models; test benches for functional verification and production test-vector generation; Application Programming Interface source code; and documentation. The soft IP package deliverables also include analog schematics, I/O cell netlists, RTL, and Verilog synthesis scripts.
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Microsemi has delivered innovative IC solutions to market for over three decades. Ready to let Microsemi's Ethernet expertise work for you? Contact your local Microsemi sales office today.
|Product Number||IP Type||Macro Type||Process|
|VSC9901||Gigabit Ethernet PHY Core||Soft Macro||65 nm|
|VSC9902||Gigabit Ethernet PHY Core||Hard Macro||65 nm|
|VSC9903||Gigabit Ethernet PHY Core||Hard Macro||65 nm|
|VSC9906||Gigabit Ethernet PHY Core||Soft Macro||65 nm|
|VSC9907||Gigabit Ethernet PHY Core||Hard Macro||65 nm|
|VSC9908||Gigabit Ethernet PHY Core||Hard Macro||40 nm|