Smart Embedded Vision
Whats New!
CoreVectorBlox Neural Network IP and the VectorBlox Accelerator SDK

The VectorBlox Accelerator Software Development Kit and PolarFire FPGAs offer the most power efficient CNN implementation in mid-range FPGAs. The machine learning offering features:
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The VectorBlox SDK requires a Linux environment for installation. It is hosted in a GitHub Model Zoo and includes:
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PolarFire FPGAs consume 30% to 50% lower power among competitive mid-range FPGAs. Other significant benefits include:
*VB V1000, VB V500, VB V250 are configurations of the CoreVectorBlox Libero IP |
Overview

As compute workloads move to the edge, PolarFire FPGAs offer 30-50% lower total power than competing mid-range FPGAs, with 5-10x lower static power, making them ideal for a new range of compute-intensive edge devices, including those deployed in thermally and power-constrained environments. PolarFire FPGA Smart Embedded Vision solutions include video, imaging, and machine learning IP and tools for accelerating designs that require high performance in low-power, small form-factors across the industrial, medical, broadcast, automotive, aerospace and defense markets.
Key PolarFire Benefits in Smart Embedded Vision
1. Lowest Total Power Consumption among competitive mid-density FPGAs
- 30% to 50% lower power consumption over competitive mid-density FPGAs
- Extended battery life in portable devices like drones, AR/ VR headset, HUDs, portable Ultrasound etc.
- Reduce system cost by eliminating thermal fans and heat sinks
- Realize lower power in 4kp60 HDMI 2.0, 12G SDI, 10G Ethernet, 12.5G CoaXPress etc. using SERDES lanes rated for 90 mW at 10G
2. Small form-factor packages starting at 11x11 mm for 100K LE
- Create compact modules with 100K (11x11 mm) and 200K (11x14.5 mm) LE devices
- Design your next-gen vision platform with small form-factor PolarFire FPGAs with unmatched features like DDR4, LPDDR3, 12.7G SERDES, 1.6 Gbps LVDS I/Os and PCIe Gen2x4
Power Consumption Competitive Benchmark with 16 Channel Audio-Video Bridge Design Example
The example design demonstrates an Audio-to-Video bridge implementation. It uses 56% LUTs, 35% Mathblocks, DDR3 and 16 channel transceivers in a PolarFire MPF500T device. Benchmarks demonstrate up to 52% lower power consumption when compared to similar density FPGAs.
16 Channel AVB Switcher Power Estimator Results
AVB Switcher (4 Ch.) | Static (W) | Core Dynamic (W) | I/O* (W) | Transceiver* (W) | Total Power (W) |
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Polar Fire (MPF500TS) | 1.493 | 2.474 | 2.991 | 0.769 | 7.727 |
Polar Fire (MPF500TLS**) | 1.059 | 2.474 | 2.991 | 0.769 | 7.293 |
Kintex 7(XC7k325T-2) | 1.796 | 5.471 | 3.971 | 4.079 | 15.317 |
Arria V(5AGXFB3H) | 2.572 | 4.350 | 5.451 | 1.651 | 14.025 |
Zynq US+(XCZU7EV-1L(0.72v)) | 2.864 | 2.165 | 4.011 | 2.694 | 11.7 |
*I/O and Transceiver power estimates include static and dynamic components. **Power Optimized Device
16 Channel AVB Switcher Resource Utilization
Resources | Count | Interface | Lanes | I/Os | Rate |
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4LUT | 271K | Transceivers | 16 | - | 2.97Gb/s |
DFF | 188K | ||||
LSRAM | 816 | ||||
uSRAM | 249 | 3x72 bit DDR3 | - | 351 | 800 Mb/s |
MathBlock | 500 |
Learn More
Learn why Microchip FPGAs consume up to 50% lower-power than competitive mid-density FPGAs? | Learn More |
Did you know that PolarFire is the world's best FPGA at protecting your IP? | Learn More |
Do you know what makes Microchip FPGAs the most reliable in the Industry? | Learn More |
Learn about Libero, the IDE for PolarFire. | Learn More |
Learn how PolarFire will fulfill your next-generation vision platform requirements. | Learn More |
Getting Started
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PolarFire Video Kit (MPF300-VIDEO-KIT-NS)
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PolarFire Video FMC Portfolio
CoaXPress FMC Card |
SDI FMC Card |
USXGMII FMC Card |
The CoaXPress FMC daughter card is the hardware evaluation platform for evaluating and testing the CoaXPress protocol. Price: $849. | SDI FMC daughter card is the hardware evaluation platform for evaluating and testing the Serial Digital interface IP. Price: $499. | The USXGMII FMC daughter card is the hardware evaluation platform for evaluating and testing the quadrate PHY IP. Price: $499 |
# | Description | Links |
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Explore and Purchase the PolarFire Video Kit. | Kit Webpage |
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Explore and Purchase the CoaXPress FMC Daughter Card. | FMC Webpage |
3 | Explore and Purchase the SDI FMC Daughter Card. | FMC Webpage |
4 | Explore and Purchase the USXGMII FMC Daughter Card. | FMC Webpage |
5 | Download Libero SoC v12.1 Software for PolarFire FPGAs. | Libero SoC v12.1 Download |
6 | The kit comes with one-year free Libero SoC Gold license. Register your Software ID. | Licensing |
7 | Download the Dual Camera Video Kit Demo Guide. | DG0849 |
8 | Download Design File, Programming Files and GUI Installer. | Design File, Program Files, GUI Installer |
9 | Explore the Imaging and Video IPs tab for more information. | Go to the Imaging and Video IPs tab. |
10 | Explore Low-Power PolarFire designs. Download the Power Estimator UG and Excel Tool. | Low Power UG, Power Estimator |
Out of Box Demo Design for the PolarFire Video Kit

Demo Guide & Programming Files
DG0849: PolarFire 4K FPGA Dual Camera Video Kit Demo Guide
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05/2020 |
Imaging and Video IPs
Microchip's FPGA product portfolio offers scalable production-ready IPs through in-house development and using our third-party partner ecosystem. Our in-house IP portfolio covers the latest embedded vision IPs like MIPI, SLVS-EC, CoaXPress, Serial Digital Interface (SDI), HDMI, etc, while our partners cover offerings in Machine Learning, H.264, DisplayPort and HDCP IPs, with many more IPs being added continuously.
Click here to see our Partner IPs.
In-house DirectCore Smart Embedded Vision IPs for PolarFire FPGA
IP | Features | Documentation |
MIPI CSI-2 Rx | Up to 1.5 Gbps per lane x 4 lanes, 4Kp60 | UG0806: MIPI CSI-2 Rx UG |
MIPI CSI-2 Tx | Up to 1 Gbps per lane x 4 lanes, 4Kp30 | UG0826: PolarFire MIPI CSI-2 Tx UG |
HDMI 2.0 Rx | Supports HDMI 2.0, 8-bit color, 1080p60 | UG0863: HDMI RX IP UG |
HDMI 2.0 Tx | Supports HDMI 2.0 and 1.4, 4Kp60 | UG0862: HDMI TX IP UG |
USXGMII | Supports 1, 2.5, 5 and 10G over Ethernet Cu PHY: EDCS-1150953 | Request Information |
3G/HD SDI Rx | 1.485 Gbps HD-SDI and 2.97 Gbps 3G-SDI | CoreSDIRX v2.2 Hand Book |
3G/HD SDI Tx | 1.485 Gbps HD-SDI and 2.97 Gbps 3G-SDI | CoreSDITX v2.2 Hand Book |
6G/12G SDI Rx | 6 Gbps (1080p120, 2160p30) and 12Gbps (2160p60) | CoreUHD_SDIRX v2.0 Hand Book |
6G/12G SDI Tx | 6 Gbps (1080p120, 2160p30) and 12 Gbps (2160p60) | CoreUHD_SDITX v2.0 Hand Book |
SLVS-EC | Supports 2.3 Gbps per lane x 2 lanes in RAW8 data type | UG0877: SLVS-EC Rx UG |
CoaXPress v1.1 | 6.25 Gbps down, 20.83 Mbps up connections, Host and Device IP | UG0875: CoaXPress IP UG |
ISP Bundle | Bayer, Video DMA, Alpha Blending, Color Space (RGB, YCbCr), Image Sharpening, Display Enhancement, Edge Detection, Display Controller, Pattern Generation, MIPI CSI-2 Rx/ Tx and LVDS 7:1 Display Rx/ Tx | UG0640: Bayer Interpolation UG UG0693: Edge Detection UG UG0639: Color Space Conversion UG UG0641: Alpha Blending UG UG0646: Display Enhancement UG UG0651: Scaler UG UG0682: Pattern Generator UG UG0649: Display Controller UG UG0944: Histogram User Guide |
For evaluation/purchase of any of the IPs, please fill in the Request Information form, or contact Local Sales in your area.
CompanionCore Smart Embedded Vision Partner IPs
Partners | Description | Supported FPGAs |
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PolarFire FPGAs |
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PolarFire FPGAs |
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PolarFire FPGAs |
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PolarFire FPGAs SmartFusion2 SoC FPGAs IGLOO2 FPGAs |
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PolarFire FPGAs |
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SmartFusion2 SoC FPGAs IGLOO2 FPGAs |
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SmartFusion2 SoC FPGAs IGLOO2 FPGAs |
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PolarFire FPGAs |
Request Information
VectorBlox AI
Overview |
Development Flow |
Documentation |
Getting Started |
Deployment Options |
VectorBlox Accelerator Software Development Kit
The VectorBlox Accelerator SDK contains different tools that compile a neural network description from TensorFlow and ONNX into a Binary Large Object (BLOB) that is stored in flash and loaded into the DDR memory during execution.
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CoreVectorBlox IP
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Development Flow
Step 1: Prepare your trained model |
Use Python scripts provided in the SDK to convert your trained model into an optimized INT8 representation called a Binary Large Object (BLOB). Run the BLOB through the VectorBlox Simulator to verify accuracy of the network and to ensure successful conversion of the network. ![]() |
Step 2: Prepare your hardware |
The PolarFire Video Kit is configured to run as an AI enabled Smart Camera. The SDK includes a pre-compiled kit image bitstream. Write the bistream into the PolarFire FPGA using the FlashPro programmer included with the kit. Write the BLOB, generated from Step 1, into the SPI flash of the kit. ![]() |
Step 3: Write your embedded code |
Use the provided embedded code in C/C++ based SoftConsole IDE and generate and program the hex file. Connect the video kit to a HDMI monitor and turn it on. Modify the embedded code to load and run many CNN BLOBs, switch CNNs dynamically on the fly or load CNNs sequentially for simultaneous inferencing. |
Documentation
Document | Description |
CoreVectorBlox IP Handbook | CoreVectorBlox Libero IP Datasheet |
VectorBlox Programmers Guide | VectorBlox SDK Installation and Tool Flow Environment Guide |
VectorBlox Demo Guide | Getting Started Guide for VectorBlox in the PolarFire Video Kit |
Core VectorBlox IP Release Notes | Release Notes for current CoreVectorBlox IP version |
Getting Started
Deployment Options
PolarFire Video Kit![]() |
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Smart Camera Reference Design using the PolarFire Video Kit | |
1. Video frame is received via MIPI CSI-2
2. And stored in the DDR via AXI-4 interconnect
3. Before inference – the frame is read back from the DDR
4. Converted from RAW to RGB, RGB to planer R, G, B and written back into DDR
5. CoreVectorBlox engine runs inference on R, G, B arrays and writes results back into DDR
6. Mi-V sorts probabilities, creates an overlay frame with bounding boxes, classification results, fps etc. and stores the frame in DDR
7. The original video frame is read and blended with the overlay frame and sent out to an HDMI display
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