PolarFire SoC
Lowest Power, Multi-Core RISC-V SoC FPGA
Overview
The PolarFire® SoC FPGA family delivers an unparalleled combination of low power consumption, thermal efficiency and defense grade security for smart, connected systems.
It's the first system on chip (SoC) field-programmable gate array (FPGA) with a deterministic, coherent RISC-V CPU cluster and a deterministic L2 memory subsystem enabling Linux and real-time applications. Built on the award-winning, mid-range, low power PolarFire FPGA Architecture, PolarFire SoC devices deliver up to 50% lower power than alternative FPGAs, span from 25k to 460k logic elements (LEs) and feature 12.7G transceivers. EEMBC CoreMark®-Pro benchmarks chart overpower consumed illustrates the PolarFire SoC low-power advantage. |
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Email to PolarFireSoC@microchip.com to find out more. |
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Addressing Key Market Opportunities
PolarFire SoC is ideally suited for secure, power-efficient compute in a wide range of applications within Imaging, Artificial Intelligence / Machine Learning (AI/ML), Internet of Things (IoT), Industrial Automation, Automotive, Aerospace and Defense, Wireline Access Networks & Cellular Infrastructure.
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Imaging / AI / ML |
Internet of Things |
Industrial Automation |
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Automotive |
Defense |
Communications |
Getting Started
Choose a Platform
Microchip Evaluation Kits
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Mi-V Partner Boards
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Choose a target to view the compatible reference material
PolarFire SoC Icicle Kit
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PolarFire SoC Model
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The PolarFire SoC Icicle kit runs Linux out of the box and offers evaluation of PCIe RP, GbE, CAN, USB, UART, SPI, I2C, Debug and Trace. Price: $489.
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Download the reference material compatible with your target
PolarFire SoC Icicle Kit | ||
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Category | Microchip / Mi-V | Links |
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Hardware | ![]() |
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Development Tools | ![]() |
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Operating System |
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Real-Time Operating System |
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Bare-metal SDK | ![]() |
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Hart Software Services | ![]() |
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Libero Project | ![]() |
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Middleware |
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Documentation | ![]() |
Documentation
Product Information
PolarFire SoC Brochure | 06/2020 |
Datasheet
PolarFire SoC Product Overview | 02/2021 |
PolarFire SoC Advance Datasheet | 12/2019 |
White Papers
PolarFire SoC CPU Performance Benchmarking White Paper Download PDF, View HTML |
12/2020 |
Errata
ER0219: PolarFire SoC FPGA: Engineering Samples (ES) Devices | 07/2020 |
Power Estimation
PolarFire and PolarFire SoC Power Estimator | 01/2021 |
UG0897: PolarFire and PolarFire SoC FPGA Power Estimator User Guide | 01/2021 |
Hardware Documentation
UG0882: PolarFire SoC FPGA ICICLE Kit User Guide Download PDF, View HTML |
01/2021 |
PolarFire SoC Icicle Kit Schematics (Preliminary) | 03/2020 |
PolarFire SoC Icicle Kit BRD File (Preliminary) | 03/2020 |
PolarFire SoC FPGA Board Design Guidelines User Guide Download PDF, View HTML |
02/2021 |
User Guides
Application Notes
02/2021 | |
AC492: Running BareMetal User Applications on PolarFire SoC FPGA Application Note |
01/2021 |
PolarFire SoC Industrial IBIS Models (All Devices)
PolarFire SoC GPIO Industrial IBIS Model | 12/2019 |
PolarFire SoC HSIO Industrial IBIS Model | 12/2019 |
PolarFire SoC MSSIO Industrial IBIS Model | 02/2021 |
PolarFire SoC Dedicated IO Industrial IBIS Model | 12/2019 |
PolarFire IBIS-AMI Package(Applicable to PolarFire SoC) | 01/2020 |
Packaging
Power Comparison
PolarFire SoC vs Competition SoC FPGAs (CoreMarks / W)
~25kLE SoC FPGAs |
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~100kLE SoC FPGAs |
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~460kLE SoC FPGAs |
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Real-Time with Linux
Safety Critical, System Control and Security applications use the flexibility that Linux offers and need Real-Time Determinism to control hardware.
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Safety Critical systems | AI / ML | Industrial IoT | Robotics | Smart Weapons and UAV |
Typical SMP implementations may offer the flexibility of a rich operating systems but are terrible for running real-time systems needing deterministic performance. | |
SMP on Quad-core Cortex-A class processor
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ISR execution times vary significantly |
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Designing a deterministic, Linux capable SoC requires a multi-dimensional approach needing architectural innovation, a coherent memory subsystem across cores and configurable branch prediction capabilities.
PolarFire SoC features a multi-core Linux capable processor that is coherent with the memory subsystem allowing a versatile mix of deterministic real-time systems and Linux in a single multi-core CPU cluster.
PolarFire SoC enables you to create a fully deterministic real-time system alongside Linux that executes on-time every time.
AMP Implementation on PolarFire SoC |
The ISR execution times are deterministic |
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Security
Defense-grade Security
Security starts during silicon manufacturing and continues through system deployment and operations. Microchip’s PolarFire SoC FPGAs represent the industry’s most advanced secure programmable FPGAs.
- Secure Hardware
- Secure wafer-sort and packaging
- Spectre and Meltdown immune CPUs
- Design Security
- DPA-resistant bitstream programming
- Anti-tamper
- DPA-resistant secure boot
- Data Security
- CRI DPA countermeasures pass-through license
- DPA-resistant crypto-coprocessor
RISC-V Physical Memory Protection (PMP)
PolarFire SoC has PMP implemented in each of the processor cores. PMPs are used to enforce memory access restrictions in conjunction with machine's privilege state, i.e. Machine mode, Supervisor mode, and User mode. |
Security Leadership
Features | PolarFire SoC | Competitor 1 | Competitor 2 | Competitor 3 |
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TRNG | Hard-IP (SP800-90A CTR_DRBG-256; SP800-90B (draft) NRBG) | ✖ | ✖ | Soft-IP |
AES | AES-128/192/256 (ECB, CBC, CTR, OFB, CFB, GCM, KeyWrap) | AES-256 (CBC) | AES-256 (CBC) | AES-256 (ECB, GCM) |
SHA | SHA-1/224/256/384/512, Key Tree | SHA-256 | SHA-256 | SHA-384 |
HMAC | HMAC-SHA-1/224/256/384/512; GMAC-AES; CMAC-AES | HMAC-SHA2-256 | HMAC-SHA2-256 | ✖ |
RSA | SigGen (ANSI X9.31, PKCS v1.5), SigVer (ANSI X9.31, PKCS v1.5)-1024/1536/2048/3072/4096 | Soft-RSA –(2048), SigGen(PKCS v1.5), SigVer (PKCS v1.5) |
Soft-RSA –(2048), SigGen(PKCS v1.5), SigVer (PKCS v1.5) |
Software library: RSA primitive (2048) |
ECDSA | KeyGen, KeyVer, SigGen & SigVer - NIST & Brainpool (P256/384/521); KAS - ECC CDH, PKG, PKV | ✖ | ✖ | ✖ |
FFC | KAS - DH, DSA SigGen & SigVer (1024/1536/2048/3072/4096) | ✖ | ✖ | ✖ |
Tamper Sense | Voltage, Temperature, Clock Frequency, Clock Glitch, Active Mesh | ✖ | ✖ | Only Voltage & Temperature |
PUF | PUF protection for Secure Key storage (Secure Boot and Data communication) | ✖ | ✖ | For secure boot key |
Bitstream Protection | DPA resistant Encrypted bit-stream programming | ✖ | ✖ | ✔ |
DPA Resistance | DPA resistant hard crypto co-processor supporting all above Crypto algorithms | ✖ | ✖ | ✖ |
Product Family
Features | PolarFire SoC FPGA | |||||
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MPFS025T | MPFS095T | MPFS160T | MPFS250T | MPFS460T | ||
FPGA Fabric | k Logic Elements (4LUT + DFF) | 23 | 93 | 161 | 254 | 461 |
Math Blocks (18x18 MACC) | 68 | 292 | 498 | 784 | 1420 | |
LSRAM Blocks (20k bit) | 84 | 308 | 520 | 812 | 1460 | |
uSRAM Blocks (64x12) | 204 | 876 | 1494 | 2352 | 4260 | |
Total RAM Mbits | 1.8 | 6.7 | 11.3 | 17.6 | 31.6 | |
uPROM Kbits | 194 | 387 | 415 | 470 | 553 | |
User DLL's/PLL's | 8 each | 8 each | 8 each | 8 each | 8 each | |
High Speed IO | 12.5 Gbps SERDES Lanes | 4 | 4 | 8 | 16 | 20 |
PCIe Gen2 End Points/Root Ports | 2 | 2 | 2 | 2 | 2 | |
Total FPGA IO | HSIO+GPIO | 108 | 276 | 312 | 372 | 468 |
Total MSS IO | MSS IO | 136 | 136 | 136 | 136 | 136 |
MSS DDR | Data Bus | 16 | 32 | 32 | 32 | 32 |
Packaging | Type (Size, Pitch) | Total User I/O: MSS-IO / HSIO / GPIO / XCVRs | ||||
FCSG325 (11x11, 11x14.5*, 0.5 mm) | 102 / 32 / 48 / 2 | 102 / 32 / 48 / 2 | ||||
FCSG536 (16x16, 0.5 mm) | 136 / 60 / 84 / 4 | 136 / 60 / 108 / 4 | 136 / 60 / 108 / 4 | |||
FCVG484 (19x19, 0.8 mm) | 136 / 60 / 48 / 4 | 136 / 60 / 84 / 4 | 136 / 60 / 84 / 4 | 136 / 60 / 84 / 4 | ||
FCVG784 (23x23, 0.8 mm) | 136 / 144 / 132 / 8 | 136 / 144 / 168 / 8 | 136 / 144 / 180 / 8 | |||
FCG1152 (35x35, 1.0 mm) | 136 / 144 / 228 / 16 | 136 / 180 / 288 / 20 |
Extended Commercial (0°C to 100°C) and Industrial (–40°C to 100°C) Temperature Support for all Die Package Combinations.
PolarFire SoC offers the Smallest Form Factors
PolarFire SoC FPGAs offer best-in-class form factors at 25k, 95k, and 250k LEs.
Block Diagram

PolarFire SoC is based on the award winning PolarFire FPGA architecture and integrates a versatile, low-power, 64-bit, multi-core RISC-V processor subsystem.
- Linux and Real-Time capable in a deterministic and coherent CPU cluster
- Integrated DDR3/4, LPDDR3/4 controllers and Phy
- Defense-grade Secure boot
- SECDED on all memories
PolarFire SoC delivers industry's lowest power at mid-range densities with exceptional security and reliability.