SmartFusion

Overview

SmartFusion^® System on Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, ARM Cortex-M3 Processor, and programmable analog circuitry, offering the benefits of full customization and IP protection, while still being easy to use. Based on a proprietary flash process, SmartFusion SoC FPGAs are ideal for hardware and embedded designers who need a true system-on-chip (SoC) solution that gives more flexibility than traditional fixed-function microcontrollers without the excessive cost of soft processor cores on traditional FPGAs.

Microcontroller Subsystem (MSS)

Hardware industry-standard 100 MHz, 32-bit ARM Cortex-M3 CPU
Multi-layer AHB communication matrix with up to 16 Gbps throughput
10/100 Ethernet MAC with RMII interface
Two of each: SPI, I2C, UART, 32-bit timers
Up to 512 KB flash and 64 KB of SRAM
External memory controller (EMC)
8-channel DMA controller
Up to 41 MSS I/Os with Schmitt trigger inputs

25 I/Os can be used as FPGA I/Os

FPGA Fabric

Based on Microsemi’s proven ProASIC3 architecture
200,000 to 500,000 system gates with 350 MHz system performance
Embedded SRAMs and FIFOs

Variable aspect ratio 4,608-bit SRAM blocks
x1, x2, x4, x9 and x18 organizations
True dual-port SRAM (including x18)

Up to 128 FPGA I/Os supporting LVDS, PCI, PCI-X and LVTTL/LVCMOS standards

Programmable Analog

High-performance analog signal conditioning blocks (SCB) with voltage, current and temperature monitors
Analog compute engine (ACE) offloads CPU from analog initialization and processing of analog-to-digital conversion (ADC), digital-to-analog conversion (DAC) and SCBs
Integrated ADCs and DACs with 1 percent accuracy
12-/10-/8-bit mode ADCs with 500/550/600 Ksps sampling rate
Up to ten 15 ns high-speed comparators
Up to 32 analog inputs and 3 outputs

Product Tables

Product Family

Please refer to the ordering tab for a list of all available part numbers.

FPGA Fabric	A2F200				A2F500
FPGA Fabric	PQ208	CS288	FG256	FG484	PQ208	CS288	FG256	FG484
System Gates	200,000				500,000
Equivalent LEs	2K				6K
Tiles (D-Flip-Flops)	4,608				11,520
RAM Blocks (4,608 bits)	8				24
	A2F200				A2F500
Microcontroller Subsystem (MSS)	PQ208	CS288	FG256	FG484	PQ208	CS288	FG256	FG484
Flash (Kbytes)	256				512
SRAM (Kbytes)	64				64
Cortex-M3 processor with MPU	Yes				Yes
10/100 Ethernet MAC	Yes				Yes
External Memory Controller (EMC)	26- bit address / 16- bit data				—	26- bit address / 16- bit data
DMA	8 Ch				8 Ch
I²C	2				2
SPI	1	2			1	2
16550 UART	2				2
32-Bit Timer	2				2
PLL	1				1	2	1	2
32 KHz Low-Power Oscillator	1				1
100 MHz On-Chip RC Oscillator	1				1
Main Oscillator (32 KHz to 20 MHz)	1				1
	A2F200				A2F500
Programmable Analog	PQ208	CS288	FG256	FG484	PQ208	CS288	FG256	FG484
ADCs(8-/10-/12-bit SAR)	2				2			3
DACs (8-/16-/24-bit sigma-delta)	2				2			3
Signal Conditioning Blocks (SCBs)	4				4			5
Comparators¹	8				8			10
Current Monitors¹	4				4			5
Temperature Monitors¹	4				4			5
Bipolar High Voltage Monitors¹	8				8			10
Temperature Grade	C, I				C, I, M

Notes:

These functions share I/O pins and may not all be available at the same time. See the "Analog Front-End Overview" section in the SmartFusion Analog UG for details.
For Part availability please refer to PDN and EOL notifications.

Packaging and I/Os

Device	A2F200²				A2F500²
Package	PQ208	CS288	FG256	FG484	PQ208	CS288	FG256	FG484
Direct Analog Inputs	8	8	8	8	8	8	8	12
Shared Analog Inputs	16	16	16	16	16	16	16	20
Total Analog Inputs	24	24	24	24	24	24	24	32
Total Analog Outputs	1	2	2	2	1	2	2	3
MSS I/Os^3,4	22	31	25	41	22	31	25	41
FPGA I/Os	66	78	66	94	66⁶	78	66	128
Total I/Os	113	135	117	161	113	135	117	204

Notes:

There are no LVTTL capable direct inputs available on A2F060 devices
These pins are shared between direct analog inputs to the ADCs and voltage/current/temperature monitors.
16 MSS I/Os are multiplexed and can be used as FPGA I/Os, if not needed for MSS. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5 / 1.8 / 2.5, 3.3 V) standards.
9 MSS I/Os are primarily for 10/100 Ethernet MAC and are also multiplexed and can be used as FPGA I/Os if Ethernet MAC is not used in a design. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5 / 1.8 / 2.5, 3.3 V standards.
10/100 Ethernet MAC is not available on A2F060.
EMC is not available on the A2F500 PQ208 and A2F060 TQ144 package

Documents

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Datasheets Product Briefs User's Guides & Manuals Application Notes
White Papers Product Information Brochures (PIB) Tutorials Other Errata Archives

Datasheets

SmartFusion Customizable System-on-Chip (cSoC) Datasheet

11.7 MB

11/2018

Military Datasheet

Military Grade SmartFusion System-on-Chip (SoC) FPGA Datasheet

9.62 MB

3/2015

Product Briefs

Military SmartFusion System-on-Chip (SoC) FPGA Product Brief	723 KB	4/2012
SmartFusion System-on-Chip (SoC) FPGA Product Brief	548 KB	9/2012

User's Guides and Manuals

Silicon & Software

Microsemi SmartFusion SoC FPGA Fabric User's Guide	4.7 MB	6/2014
SmartFusion Bus Functional Model User's Guide	1 MB	8/2012
UG0250: SmartFusion Microcontroller Subsystem User Guide	21.46 MB	2/2016
SmartFusion Programmable Analog Users Guide	5.25 MB	5/2020
Smartfusion MSS ARM Cortex-M3 Configuration	316 KB	6/2010
SmartFusion Dedicated Fabric Clock Conditioning Circuit with PLL Integration	558 KB	7/2011
SmartDesign MSS Canvas	542 KB	3/2012
SmartDesign MSS Simulation	513 KB	6/2010
SmartDesign MSS Running the MSS Configurator in your Software Tool Chain	483 KB	6/2010

MSS Peripherals

SmartDesign MSS ACE Configuration	3 MB	8/2012
SmartDesign MSS ACE Simulation	1 MB	1/2011
SmartDesign MSS AHB Bus Matrix Configuration	355 KB	6/2010
SmartDesign MSS Clock Configuration	500 KB	4/2013
SmartDesign MSS Configurator Overview	887 KB	3/2012
SmartDesign MSS Embedded FlashROM (eFROM) Configuration	319 KB	6/2010
SmartDesign MSS Embedded Nonvolatile Memory (eNVM) Configuration	641 KB	6/2010
SmartDesign MSS Ethernet MAC Configuration	413 KB	1/2011
SmartDesign MSS External Memory Controller (EMC) Configuration	361 KB	7/2010
SmartDesign MSS Firmware	527 KB	6/2010
SmartDesign MSS GPIO Configuration	712 KB	7/2010
SmartDesign MSS I2C Configuration	317 KB	6/2010
SmartDesign MSS Interrupt Management	296 KB	8/2012
SmartDesign MSS MSS I/O Configuration	828 KB	7/2010
SmartDesign MSS I/O Editor	544 KB	6/2010
SmartDesign MSS Peripheral DMA Configuration	263 KB	6/2010
SmartDesign MSS Real Time Counter (RTC) Configuration	213 KB	6/2010
SmartDesign MSS Reset Management Configuration	343 KB	7/2010
SmartDesign MSS SPI Configuration	327 KB	6/2010
SmartDesign MSS Timer Configuration	220 KB	6/2010
SmartDesign MSS UART Configuration	320 KB	6/2010
SmartDesign MSS Watchdog Configuration	268 KB	6/2010

Interfaces

SmartDesign MSS Fabric Interface Configuration	606 KB	8/2012
SmartDesign MSS How to Create a MSS and Fabric AMBA AHBLite Design (MSS Master Mode)	1 MB	7/2010
SmartDesign MSS How to Create a MSS and Fabric AMBA APB3 Design (MSS Master Mode)	1 MB	7/2010
SmartDesign MSS How to Create a MSS and Fabric AMBA AHBLite/APB3 Design (MSS Master Mode)	1 MB	7/2010

Hardware

New/Old OLED Display Drivers and Datasheets		5 MB	11/2012
SmartFusion Evaluation Kit User's Guide Manufacturing Programming File (ZIP, 3.3 MB, 8/12)	6 MB	03/2017
SmartFusion Development Kit User's Guide A2F500-DEV-KIT Manufacturing Programming File (ZIP, 13 MB, 8/10) A2F-DEV-KIT Manufacturing Programming File (ZIP, 7.63 MB, 3/10) Note: For use with the older A2F-DEV-KIT that used the A2F200 device	7 MB	03/2017
Mixed Signal Daughter Card User's Guide	1 MB	10/2010
DC-DC Regulator Guide for Microsemi FPGAs and SoC FPGAs	379 KB	3/2013

Reference Designs

NOTE : Please extract design files in the root directory of your local drive (e.g. C :\) using WinRAR. Please refer to the Knowledge Base article if an error is encountered with SoftConsole. Known Issue I8879

SmartFusion SoC FPGA Display Solution Using Open GL SC Graphics Library and Customizable Display Controller in FPGA Fabric Demo User's Guide Design Files (RAR, 55 MB, 11/12) New/Old OLED Display Drivers and Datasheets (ZIP, 5.2 MB, 11/12) USB-UART Driver Files Silicon Labs CP2102 (ZIP, 5.2 MB, 1/12)	2 MB	5/2012
SmartFusion Modbus TCP Demo Using lwIP and FreeRTOS User's Guide Design Files (RAR, 16.1 MB, 11/12)	1 MB	5/2012
Microsemi SmartFusion Modbus Reference Design User's Guide Design Files (RAR, 7.3 MB, 11/12)	1 MB	1/2013

Application Notes

AC333: Connecting User Logic to the SmartFusion Microcontroller Subsystem App Note Design Files (RAR, 26.8 MB, 11/12)	1 MB	2/2012
AC335: Building an APB3 Core for SmartFusion SoC FPGA App Note Design Files (RAR, 14.8 MB, 11/12)	1,001 KB	8/2012
AC336: Designing a High-Speed Timer in SmartFusion Fabric App Note Design Files (RAR, 13.7 MB, 11/12) Programming Files (RAR, 161 KB, 5/12)	775 KB	1/2013
AC338: Interrupting SmartFusion MSS Using GPIO and FABINT App Note Design Files (RAR, 19.6 MB, 11/12) Programming files (RAR, 229 KB, 5/12)	416 KB	1/2013
AC339: Interrupting SmartFusion MSS Using FABINT App Note Design Files (RAR, 25.2 MB, 11/12) Programming files (RAR, 292 KB, 5/12)	679 KB	1/2013
AC343: Accessing Serial Flash Memory Using SPI Interface App Note Design Files (RAR, 8.8 MB, 11/12) Programming Files (RAR, 50.6 KB, 5/12)	712 KB	1/2013
AC345: SmartFusion SoC FPGA: Accessing EEPROM Using I2C App Note Design Files (RAR, 4.3 MB, 11/12) Programming Files (RAR, 24.4 KB, 5/12)	673 KB	1/2013
AC346: SmartFusion SoC FPGA : Loading and Booting from External Memories App Note Design Files (RAR, 12 MB, 11/12) Programming Files (RAR, 39.1 KB, 5/12)	1 MB	2/2012
AC347: SmartFusion SoC FPGA: Interfacing with OLED using I2C App Note Design Files (RAR, 10.5 MB, 11/12) Programming Files (RAR, 418 KB, 11/12)	632 KB	1/2013
AC348: SmartFusion SoC FPGA: Accessing External Memories Using the External Memory Controller App Note Design Files (RAR, 4.5 MB, 11/12) Programming Files (RAR, 47.3 KB, 5/12)	733 KB	2/2012
AC349: Bidirectional Level Shifter App Note Design Files (ZIP, 2.1 KB, 2/11)	396 KB	4/2011
AC350: SmartFusion SoC FPGA: Waveform Generation Using ACE DAC Design Files (RAR, 31.1 MB, 11/12) Programming Files (RAR, 61.2 KB, 5/12)	1 MB	1/2013
AC352: SmartFusion SoC FPGA: Using ACE with PDMA Design Files (RAR, 9.3 MB, 11/12) Programming Files (RAR, 101 KB, 5/12)	940 KB	1/2013
AC355: SmartFusion SoC FPGA: DSP Coprocessor in FPGA Fabric App Note Design Files (RAR, 38.0 MB, 11/12) Programming Files (RAR, 248 KB, 5/12)	765 KB	1/2013
AC356: SmartFusion SoC FPGA : USB Interface Using Fabric Design Files (RAR, 64.5 MB, 2/12)	2 MB	2/2012
AC359: SmartFusion Board Design Guidelines App Note	1 MB	7/2014
AC360: SmartFusion SoC FPGA : Implementation of FatFs on Serial Flash App Note Design Files (RAR, 14 MB, 11/12) Programming Files (RAR, 302 KB, 5/12)	967 KB	1/2013
AC361: SmartFusion: FPGA Fabric Synthesis Guidelines App Note	801 KB	1/2011
AC362: SmartFusion cSoC: Programming FPGA Fabric and eNVM Using In-Application Programming Interface App Note Design Files (RAR, 47.1 MB, 1/2015)	3.26 MB	1/2015
AC363: SmartFusion SoC FPGA: Achieving Maximum Throughput From FPGA Master to MSS Peripherals App Note Design Files (RAR, 19.7 MB, 11/12)	2 MB	2/2012
AC364: SmartFusion SoC FPGA: System Power Optimization Using Low Power Modes App Note Design Files (RAR, 5.1 MB, 11/12) Programming Files (RAR, 46.1 KB, 5/12)	677 KB	2/2012
AC365: SmartFusion cSoC: Running Webserver,TFTP on lwIP TCP/IP Stack App Note Design Files (RAR, 54.7 MB) Programming Files (RAR, 21 KB)	2 MB	11/2014
AC366: SmartFusion SoC FPGA: ACE Sequencing Control Using Fabric and MSS App Note Design Files (RAR, 24.7 MB, 11/12)	1 MB	2/2012
AC367: SmartFusion Design Migration Considerations from A2F200_060 (Virtual 060) to A2F060 (Real 060) App Note	226 KB	8/2011
AC372: SmartFusion SoC FPGA: Basic Bootloader and Field Upgrade eNVM Through IAP Interface App Note Design Files (RAR, 11.9 MB, 11/12) Programming Files (RAR, 58.4 KB, 5/12)	2 MB	1/2013
AC373: Source-Synchronous Clock Designs: Timing Constraints and Analysis App Note Design Files (ZIP, 5.1 MB, 11/11)	2 MB	11/2011
AC374: Simultaneous Read-Write Operations in Dual-Port SRAM for Flash-Based SoC FPGAs and FPGAs App Note	2 MB	9/2011
AC375: SmartFusion SoC FPGA: Enhancing Analog Front-End Performance Using Oversampling and Fourth- Order Sigma-Delta Modulator App Note Design Files (RAR, 18.4 MB, 11/12) Programming Files (RAR, 174 KB, 5/12)	1 MB	2/2012
AC376: SmartFusion SoC FPGA: Implementation of FLAC Player Using Hardware and Software Partitioning App Note Design Files (RAR, 21.9 MB, 11/12)	2 MB	1/2013
AC377: SmartFusion SoC FPGA: DC Fan Control Using PWM App Note Design Files (RAR, 14.7 MB, 11/12) Programming Files (RAR, 104 KB, 5/12)	1 MB	2/2012
AC379: Advanced Static Timing Analysis Using SmartTime App Note	6 MB	11/2011
AC380: Internal Power-on Reset and Post Programming Reset Circuit for Flash-Based FPGAs App Note Design Files (RAR, 10.9 MB, 11/12)	541 KB	2/2012
AC381: SmartFusion SoC FPGA: Multi-Channel FFT Co-Processor Using FPGA Fabric App note Design Files (RAR, 19.9 MB, 11/12)	1,011 KB	2/2012
AC382: Zeroization Application note Design Files (RAR, 14.8 MB, 11/12) Programming Files (RAR, 177 KB, 5/12)	597 KB	3/2012
AC385: SmartFusion SoC FPGA: Mixed Signal Power Manager: Customizing the MPM Reference Design App Note Design Files (ZIP, 10.3 MB, 8/12) Programming Files (ZIP, 220 KB, 8/12)	4 MB	8/2012

Quality & Reliability Reports

Microsemi SoC Reliability Report - Rev. 12

5 MB

9/2014

White Papers

Design Made Easy With Mixed-Signal FPGAs and State of the Art Software Tools White Paper			8/2012
Driving Higher PV Inverter Efficiencies through a System-on-Chip (SOC) FPGA White Paper			5/2012
Mixed Signal Power Management White Paper			6/2010
Secure Foundations White Paper			12/2010
Single-Event Upsets (SEUs) and Medical Devices White Paper			12/2010
Size, Reliability and Security: The Essential Ingredients for Medical Devices White Paper			8/2011
SmartFusion SoC FPGA: Intelligent, Innovative Integration White Paper			8/2012
System Management White Paper			4/2012
The Core of the Smart Grid			12/2010
Using Intelligent Mixed Signal FPGAs for xTCA Hardware Platform Management			8/2012

Product Information Brochures (PIB)

SmartFusion Product Information Brochure	4.59 MB	1/2020
Microsemi Photovoltaic Solutions Brochure	2 MB	6/2012

Tutorials

Displaying POT Level with LEDs: Libero SoC and µVision4 IDE Flow Tutorial for SmartFusion SoC FPGA Design Files (RAR, 14 MB, 11/12) Programming Files (RAR, 82.6 KB, 5/12)	2 MB	5/2012
Displaying POT Level with LEDs: Libero SoC and IAR Embedded Workbench Flow Tutorial for SmartFusion SoC FPGA Design Files (RAR, 13 MB, 12/12) Programming Files (RAR, 152 KB, 5/12)	1 MB	5/2012
Displaying POT Level with LEDs: Libero SoC and SoftConsole Flow Tutorial for a SmartFusion SoC FPGA Design Files (RAR, 13.7 MB, 11/12) Programming Files (RAR, 153 KB, 5/12)	1 MB	5/2012
Displaying POT Values over UART SoftConsole Standalone Flow Tutorial for SmartFusion SoC FPGA Design Files (RAR, 15.9 MB, 11/12) Programming Files (RAR, 142 KB, 5/12)	1 MB	5/2012
SmartFusion cSoC Webserver Demo Using uIP and FreeRTOS User Guide Design files using Softconsole (RAR, 16.3 MB, 12/14) Design files using IAR (RAR, 16.4 MB, 12/14) Design files using Keil (RAR, 13.6 MB, 12/14) Programming File (RAR, 711 KB, 1/14) Webserver Libero Design Files (ZIP, 8.8 MB, 8/12)	3.34 MB	12/2014
SmartFusion SoC FPGA: Building Executable Image in Release Mode and Loading into eNVM Tutorial	1 MB	5/2012
Using Keil µVision and Microsemi SmartFusion SoC FPGAs Programming File (ZIP, 91 KB, 7/10)	1 MB	1/2012
Using UART with a SmartFusion SoC FPGA: Libero SoC and IAR Embedded Workbench Flow Tutorial Design Files (RAR, 8 MB, 11/12) Programming Files (RAR, 45.1 KB, 5/12)	1 MB	5/2012
Using UART with a SmartFusion SoC FPGA: Libero SoC and SoftConsole Flow Tutorial Design Files (RAR, 16.8 MB, 11/12) Programming Files (RAR, 134 KB, 5/12)	1 MB	5/2012
Using UART with SmartFusion SoC FPGA: SoftConsole Standalone Flow Tutorial Design Files (RAR, 16.9 MB, 11/12) Programming Files (RAR, 133 KB, 5/12)	1 MB	5/2012

Other

Designing SmartFusion with IAR Systems	125 KB	2/2011
Designing SmartFusion with Keil	229 KB	7/2017
Intelligent Power Management with MPM for SmartFusion	156 KB	2/2011
Linux on Microsemi SmartFusion SoC FPGAs	150 KB	3/2011
Microsemi SmartFusion Design Resources	202 KB	2/2011

Errata

SmartFusion SoC FPGA, Errata

346 KB

11/2016

Design Resources

Design Software	Libero SoC Design Software integrates industry leading synthesis, debug and DSP support from Synopsys, and simulation from Siemens with power analysis, timing analysis and push button design flow.
Request a License	Free full feature licenses are available for all family members.
Design Hardware	SmartFusion FPGAs are fully supported by design hardware supplied by Microsemi and partners, covering a range from low-cost evaluation to full-featured development kits and application-specific daughter cards. The SmartFusion Evaluation Kit is ideal for first time users who want to evaluate the technology and experiment with different communication interfaces and peripherals. The SmartFusion Development Kit is a full-featured development platform with extensive memory on-board, multiple networking options, and both digital and analog expansion headers. The Mixed Signal Daughter Card implements complex configurable power management and can be used with either the evaluation or development kit. The Mixed signal Power Manager Daughter Card Kit is designed for connection to the mixed signal header on the SmartFusion Evaluation or Development Kit. The board includes test points for the signals driven by the mixed signal header and also has a 100 mil header which can be used to wire wrap or solder signals directly. The SmartFusion EmCraft Systems Linux Evaluation Kit provides a platform for evaluation and development of Linux on the ARM Cortex-M3 CPU core of the SmartFusion FPGA.
Programming & Debug	SmartFusion is supported by FlashPro for in-circuit programming and Silicon Sculptor 3 for standalone device programming.
IP Cores	Search for SmartFusion IP cores
Embedded Ecosystem	The SmartFusion Embedded Ecosystem includes a number of partners who provide third-party tools, firmware, and middleware.
Partners	Many of Microsemi’s Partners are engaged in development with SmartFusion devices
Power Analysis	Leverage our Excel based SmartFusion power calculator to evaluate power for your design without running through the full design flow. SmartPower can also provide design specific power analysis for your design implementation within Libero.
IBIS Models	Generic SmartFusion IBIS Models are available for signal integrity simulations. Design specific files can also be exported from your design implementation in Libero.
BSDL Models	Generic SmartFusion BSDL Models are available for boundary scan testing. Design specific files can also be exported from your design implementation in Libero.

Product Selector Guide

SmartFusion SoCs integrate an FPGA fabric, an ARM Cortex-M3 processor, and a programmable analog compute engine (ACE), offering full customization, IP protection, and ease-of-use. Based on Microsemi’s proprietary flash process, SmartFusion SoCs are ideal for hardware and embedded designers who need a true system-on-chip that gives more flexibility than traditional fixed-function microcontrollers without the excessive cost of soft processor cores on traditional FPGAs.

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