SmartFusion2 SoC
More Resources in Low Density Devices
Overview
|
|||
These flash FPGA devices are ideal for general purpose functions such as Gigabit Ethernet or dual PCI Express control planes, bridging functions, input/output (I/O) expansion and conversion, video/image processing, system management and secure connectivity. Microsemi FPGAs are used by customers in Communications, Industrial, Medical, Defense, and Aviation markets. The following new military grade FPGA devices are being supported from Libero SoC v12.0.
|
|||
More Resources in Low Density Devices
|
|
||
SmartFusion2 SoC FPGA Architecture
SmartFusion2 SoC FPGAs offer 5K-150K LEs with a 166MHz ARM® Cortex™-M3 processor, including ETM and Instruction Cache with on-chip eSRAM & eNVM and a complete Microcontroller Subsystem with extensive peripherals including CAN, TSE, USB. Architecture highlights include:
| • Up to 16x Transceiver lanes - PCIe Gen 2, XAUI / XGXS+, Generic (EPCS) mode at 3.2G • Up to 150K LEs, 5Mbit SRAM, 4Mbit eNVM • Hard 667 mbps DDR2/3 controllers • Integrated DSP processing blocks |
• Power as low as 7mW Standby, Typical • DPA Hardened, AES256, SHA256 • On-Demand NVM Data Integrity Check • SEU Protected/Tolerant Memories: eSRAMs, DDR Bridges |
Click on image for full screen view 
Product Tables
Product Family
| Features | M2S005 | M2S010 | M2S025 | M2S050 | M2S060 | M2S090 | M2S150 | |
|---|---|---|---|---|---|---|---|---|
| Logic/DSP | Maximum Logic Elements (4LUT + DFF)* | 6,060 | 12,084 | 27,696 | 56,340 | 56520 | 86,316 | 146,124 |
| Math Blocks (18x18) | 11 | 22 | 34 | 72 | 72 | 84 | 240 | |
| Fabric Interface Controllers (FICs) | 1 | 2 | 1 | 1 | 2 | |||
| PLLs and CCCs | 2 | 6 | 8 | |||||
| Security | AES256, SHA256, RNG | 1 each | 1 each | |||||
| ECC, PUF | - | 1 each | ||||||
| MSS | Cortex-M3 + Instruction cache | Yes | ||||||
| eNVM (K Bytes) | 128 | 256 | 512 | |||||
| eSRAM (K Bytes) | 64 | |||||||
| eSRAM (K Bytes) Non SECDED | 80 | |||||||
| CAN, 10/100/1000 Ethernet, HS USB | 1 each | |||||||
| Multi-Mode UART, SPI, I2C, Timer | 2 each | |||||||
| Fabric Memory | LSRAM 18K Blocks | 10 | 21 | 31 | 69 | 69 | 109 | 236 |
| uSRAM1K Blocks | 11 | 22 | 34 | 72 | 72 | 112 | 240 | |
| Total RAM (K bits) | 191 | 400 | 592 | 1314 | 1314 | 2074 | 4488 | |
| High Speed | DDR Controllers (Count x Width) | 1x18 | 2x36 | 1x18 | 1x18 | 2x36 | ||
| SERDES Lanes | 0 | 4 | 8 | 4 | 4 | 16 | ||
| PCIe End Points | 0 | 1 | 2 | 4 | ||||
| User I/Os | MSIO (3.3V) | 115 | 123 | 157 | 139 | 271 | 309 | 292 |
| MSIOD (2.5V) | 28 | 40 | 40 | 62 | 40 | 40 | 106 | |
| DDRIO (2.5V) | 66 | 70 | 70 | 176 | 76 | 76 | 176 | |
| Total User I/O | 209 | 233 | 267 | 377 | 387 | 425 | 574 | |
| Grades | Commercial (C), Industrial (I), Military (M), Automotive (T2)* | C,I,T2 | C,I,M,T2 | C,I,M,T2 | C,I,M,T2 | C,I,M,T2 | C,I,M,T2 | C,I,M |
| * Total logic may vary based on utilization of DSP and memories in your design. Please see the SmartFusion2 Fabric UG for details * Automotive grade is available only in VF256, VF400, FG484, FG676 and TQ144 packages |
||||||||
Packaging and I/Os
| Type | FCS325 | VF256 | FCS536 | VF400 | FCV484 | TQ144 | FG484 | FG676 | FG896 | FC1152 | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Pitch (mm) | 0.5 | 0.8 | 0.5 | 0.8 | 0.8 | 0.5 | 1.0 | 1.0 | 1.0 | 1.0 | ||||||||||
| L x W (mm) | 11x11 | 14x14 | 16x16 | 17x17 | 19x19 | 20x20 | 23x23 | 27x27 | 31x31 | 35x35 | ||||||||||
| Device | I/O | Lanes | I/O | Lanes | I/O | Lanes | I/O | Lanes | I/O | Lanes | I/O | Lanes | I/O | Lanes | I/O | Lanes | I/O | Lanes | I/O | Lanes |
| M2S005 | 161 | - | 171 | - | 84 | - | 209 | - | ||||||||||||
| M2S010 | 138 | 2 | 195 | 4 | 84 | - | 233 | 4 | ||||||||||||
| M2S025 | 180 | 2 | 138 | 2 | 207 | 4 | 267 | 4 | ||||||||||||
| M2S050 | 200 | 2 | 207 | 4 | 267 | 4 | 377 | 8 | ||||||||||||
| M2S060 | 200 | 2 | 207 | 4 | 267 | 4 | 387 | 4 | ||||||||||||
| M2S0901 |
180 | 4 | 267 | 4 | 425 | 4 | ||||||||||||||
| M2S150 | 293 | 4 | 248 |
4 |
574 | 16 | ||||||||||||||
1-090 FCS325 is 11x13.5 pkg dim
SMALL FORM FACTOR PACKAGES: If you do not find the package or features you are looking for here please contact FPGA_marketing@microchip.com
.
Documentation
Showing 205 Documents
Application Notes
Low Power
AC400: SmartFusion2 SoC FPGA Flash*Freeze Entry and Exit - With SoftConsole - Libero SoC v11.8 Application Note
- Design Files [ RAR, 71.5 MB ]
1.42 MB
04/2017
MSS
AC430: SmartFusion2 I2C Reference Design using Multiple Masters and Multiple Slaves - Libero SoC v11.7 Application Note
- Design Files [ RAR, 71.9 MB ]
2.71 MB
02/2016
AC388: SmartFusion2 SoC FPGA - Dynamic Configuration of AHB Bus Matrix - Libero SoC v11.7 Application Note
- Design Files [ RAR, 116 MB ]
- Programming Files [ RAR, 116 MB ]
1.83 MB
02/2016
AC389: SmartFusion2 SoC FPGA - Cache Controller Configuration - Libero SoC v11.7 Application Note
- Design Files [ RAR, 77.7 MB ]
- Programming Files [ RAR, 77.7 MB ]
1.96 MB
03/2016
947 KB
03/2014
AC409: Connecting User Logic to AXI Interfaces of High-Performance Communication Blocks in the SmartFusion2 Devices - Libero v11.7 Application Note
- Design Files [ RAR, 78.3 MB ]
3.05 MB
03/2016
AC456: Running uClinux on SmartFusion2 Advanced Development Kit Board Application Note
- Design Files [ RAR, 421 MB ]
3.21 MB
10/2016
DSP
High-Speed Serial Interface
AC437: Implementing PCIe Reset Sequence in SmartFusion2 and IGLOO2 Devices Application Note
- Design Files [ ZIP, 373 MB ]
3.64 MB
04/2021
Security
AC435: Using ECC System Service in SmartFusion2 - Libero SoC v11.7 Application Note
- Design Files [ RAR, 69.4 MB ]
- Programming Files [ RAR, 69.4 MB ]
2.3 MB
04/2016
AC407: Using NRBG Services in SmartFusion2 and IGLOO2 Devices - Libero SoC v11.8 Application Note
- SmartFusion2 Design Files [ RAR, 67.8 MB ]
- IGLOO2 Design Files [ RAR, 67.8 MB ]
968.16 kB
05/2017
AC410: Using AES System Services in SmartFusion2 and IGLOO2 Devices - Libero SoC v11.8 Application Note
- Design Files [ RAR, 213 MB ]
- Programming Files [ RAR, 213 MB ]
1003.77 kB
04/2017
AC406: Configuring IGLOO2 and SmartFusion2 Devices for Safety-Critical Applications Application Note
5.39 MB
12/2019
AC432: Using SHA-256 System Services in SmartFusion2 and IGLOO2 Devices - Libero SoC v11.8 Application Note
- Design Files [ RAR, 320 MB ]
977.11 kB
05/2020
AC433: Using Zeroization in SmartFusion2 and IGLOO2 Devices - Libero SoC v11.6 Application Note
- Design Files [ RAR, 173 MB ]
2.91 MB
10/2015
AC436: Using Device Certificate System Service in SmartFusion2 - Libero SoC v11.7 Application Note
- Design Files [ RAR, 68.6 MB ]
- Programming Files [ RAR, 68.6 MB ]
1.96 MB
05/2020
AC434: Using SRAM PUF System Service in SmartFusion2 - Application Note
- Design Files [ ZIP, 75.4 MB ]
2.08 MB
06/2021
Memory/Controller
AC426: Implementing Production Release Mode Programming for SmartFusion2 Application Note
- Design Files [ ZIP, 160 MB ]
7.14 MB
05/2021
AC429: SmartFusion2 and IGLOO2 - Accessing eNVM and eSRAM from FPGA Fabric Application Note
- Design Files [ ZIP, 111 MB ]
15.14 MB
04/2021
AC390: SmartFusion2 SoC FPGA – Remapping eNVM, eSRAM, and DDR/SDR SDRAM Memories Application Note
- Design Files [ ZIP, 135 MB ]
13.82 MB
05/2021
931.16 kB
06/2021
AC392: SmartFusion2 SoC FPGA SRAM Initialization from eNVM - Libero SoC v11.7 Application Note
- Design Files [ RAR, 211 MB ]
3.08 MB
03/2016
AC417: SmartFusion2 - Distributing and Running Code from Multiple Memory Regions
- Design Files [ RAR, 47.1 MB ]
- Programming Files [ RAR, 47.1 MB ]
4.25 MB
04/2014
AC428: SmartFusion2 and IGLOO2 - DDR Low Power Modes - Libero SoC v11.7 Application Note
- Design Files [ RAR, 27.8 MB ]
2.93 MB
02/2016
AC422: SmartFusion2 - Optimizing DDR Controller for Improved Efficiency - Libero v11.7 Application Note
- Design Files [ RAR, 238 MB ]
3.5 MB
04/2016
AC451: SmartFusion2 based Serial Display Solution - Using OpenGL SC Graphics Library and SPI interface User Guide - Libero SoC v11.7 Application Note
- Design Files [ RAR, 83.4 MB ]
1.43 MB
05/2016
AC450: Timing Optimization for AXI3 DDR Interfaces Using SmartFusion2/IGLOO2 - Application Note
- Design Files [ ZIP, 886 MB ]
3.15 MB
06/2021
Others
Migration
1.14 MB
02/2014
Programming
Board Design
Characterization Reports
High-Speed Serial Interface
Configuration Guides
Low Power
No Documents Available.
MSS
496 KB
06/2015
DSP
High-Speed Serial Interface
Security
No Documents Available.
Memory/Controller
Others
Migration
No Documents Available.
Programming
Datasheets
Demo / Reference Designs
Low Power
1.54 MB
03/2016
MSS
DG0472: Running Webserver and TFTP Server on SmartFusion2 Devices Using IwIP and FreeRTOS - Demo Guide
- Design Files [ ZIP, 164 MB ]
10.27 MB
06/2021
DG0476: SmartFusion2 - USB OTG Capabilities - Demo Guide
- Design Files [ ZIP, 93.05 MB ]
7.28 MB
06/2021
DG0440: Modbus TCP Reference Design on SmartFusion2 using lwIP and FreeRTOS - Libero SoC v11.8 Demo Guide
- Design Files [ RAR, 119 MB ]
2.63 MB
03/2017
DG0516: Running Secure Webserver on SmartFusion2 Devices Using PolarSSL, lwIP, and FreeRTOS
- Design Files [ ZIP, 163 MB ]
9.55 MB
07/2021
DSP
DG0441: SmartFusion2 SoC FPGA Adaptive FIR Filter - Libero SoC v11.8 SP1 Demo Guide
- Starter Kit Design Files [ RAR, 23 MB ]
- Security Evaluation Kit Files [ RAR, 108 MB ]
2.38 MB
09/2017
4.02 MB
12/2014
DG0611: Implementing the JESD204B Interface using SmartFusion2 Demo Guide
- Design Files [ ZIP, 224 MB ]
1.73 MB
04/2021
High-Speed Serial Interface
1.94 MB
05/2016
550.92 kB
01/2020
DG0535: SmartFusion2 PCIe Data Plane Demo using MSS HPDMA and SMC FIC - Libero SoC v11.7 Demo Guide
- Design Files [ RAR, 116 MB ]
3.31 MB
04/2016
DG0566: SmartFusion2 SoC FPGA PCIe Control Plane Demo For Advanced Development Kit - Libero SoC v11.8 SP1 Demo Guide
- Design Files [ RAR, 281 MB ]
3.9 MB
09/2017
DG0517: SmartFusion2 and IGLOO2 PCIe Data Plane Demo using 2 Channel Fabric DMA Demo Guide
- Design Files [ zip, 790 MB ]
39 MB
04/2021
DG0634: Running CoreTSE AHB IP based Webserver on SmartFusion2 using lwIP and FreeRTOS ‰ÛÒ Libero SoC v11.7 SP2 Demo Guide
- Design Files [ RAR, 205 MB ]
2.67 MB
11/2016
DG0637: SmartFusion2 SoC FPGA CoreTSE AHB 1000 Base-T Loopback Demo - Libero SoC v11.8 Demo Guide
- Design Files [ RAR, 164 MB ]
1.42 MB
03/2017
Security
No Documents Available.
Memory/Controller
DG0388: SmartFusion2 - Error Detection and Correction of eSRAM Memory Demo Guide
- Design Files [ ZIP, 172 MB ]
1.09 MB
04/2021
DG0534: Interfacing SmartFusion2 SOC and IGLOO2 FPGA with External LPDDR Memory through MDDR Controller Demo Guide
- Design Files [ ZIP, 99 MB ]
- Design Files [ ZIP, 99 MB ]
6.09 MB
04/2021
DG0618: Error Detection and Correction on SmartFusion2 Devices using DDR Memory - Libero SoC v11.8 Demo Guide
- Design Files [ RAR, 114 MB ]
945.45 kB
03/2017
DG0386: SmartFusion2 SoC FPGA Code Shadowing from SPI Flash to DDR Memory - Libero SoC v11.7 Demo Guide
- Design Files [ RAR, 238 MB ]
1.53 MB
03/2016
DG0669: SmartFusion2 Code Shadowing from SPI Flash to LPDDR Memory - Libero SoC v11.7 Demo Guide
- Design Files [ RAR, 148 MB ]
3.16 MB
04/2016
Others
DG0598: SmartFusion2 Dual-Axis Motor Control Starter Kit Demo Guide
- Programming Files [ RAR, 632 KB ]
- GUI Installers [ RAR, 632 KB ]
4.44 MB
12/2017
Migration
No Documents Available.
Programming
DG0454: SmartFusion2 SoC FPGA - In-System Programming Using UART Interface Demo - Libero SoC v11.8 Demo Guide
- Design Files [ RAR, 220 MB ]
3.96 MB
04/2017
DG0471: SmartFusion2 SoC FPGA - In-System Programming Using USB OTG Controller Interface - Libero SoC v11.8 Demo Guide
- Design Files [ RAR, 377 MB ]
4.36 MB
04/2017
DG0584: SmartFusion2 SoC FPGA In-Application Programming Using PCIe Interface - Libero SoC v11.8 Demo Guide
- Design Files [ RAR, 332 MB ]
3.73 MB
04/2017
Errata
FAQs
Kit User Guides
1.49 MB
07/2017
Pinout / Packaging
Power Calculators
Product Brochures
Quality & Reliability Reports
Silicon User Guides
Low Power
MSS
DSP
No Documents Available.
High-Speed Serial Interface
Security
Memory/Controller
Others
Migration
No Documents Available.
Programming
Tutorials
Low Power
No Documents Available.
MSS
TU0310: Interfacing User Logic with the Microcontroller Subsystem Design Flow Tutorial
- Design Files [ ZIP, 95.5 MB ]
5.15 MB
05/2021
TU0548: Accessing Serial Flash Memory Using SPI Interface - Libero SoC v11.7 SoC and Keil uVision Flow for SmartFusion2 Tutorial
- Design Files [ RAR, 76.4 MB ]
6.23 MB
03/2016
TU0547: Accessing Serial Flash Memory Using SPI Interface - Libero SoC v11.7 and IAR Embedded Workbench Flow Tutorial for SmartFusion2
- Design Files [ RAR, 68.7 MB ]
2.64 MB
04/2016
TU0559: SmartFusion2 Controller Area Network (CAN) - Libero SoC v11.5 Tutorial
- Design Files [ RAR, 85.6 MB ]
2.99 MB
02/2015
DSP
TU0312: DSP Flow for SmartFusion2 and IGLOO2 Devices - Libero SoC v11.7 Quickstart and Design Tutorial
- Design Files for SmartFusion2 [ RAR, 27.7 MB ]
- Design Files for IGLOO2 [ RAR, 27.7 MB ]
3.68 MB
04/2016
High-Speed Serial Interface
TU0456: SmartFusion2 SoC FPGA PCIe Control Plane - Libero SoC v11.8 SP1 Tutorial
- Design Files [ RAR, 329 MB ]
9.37 MB
09/2017
TU0570: Implementing a SmartFusion2 and IGLOO2 SERDES EPCS Protocol Design - Tutorial
- IGLOO2 Design Files [ ZIP, 129 MB ]
- SmartFusion2 Design File [ ZIP, 129 MB ]
33.82 MB
01/2021
Security
Memory/Controller
TU0372: Interfacing SmartFusion2 SoC FPGA with DDR3 Memory Through MDDR Controller System Builder Flow Tutorial
- Design Files [ zip, 150 MB ]
3.07 MB
05/2021
TU0311: SmartFusion2 - Accessing External SDRAM through Fabric - Libero SoC v11.7 Tutorial
- Design Files [ RAR, 2.65 MB ]
3.99 MB
04/2016
Others
No Documents Available.
Migration
No Documents Available.
Programming
TU0530: SmartFusion2 and IGLOO2 SmartDebug Hardware Design Debug Tools - Libero SoC v11.8 SP1 Tutorial
- Design Files [ RAR, 315 MB ]
4.64 MB
09/2017
White Paper
Design Resources
Design Software Kits & Boards Power Analysis Programming and Debug IP Cores
Embedded Ecosystem Partners BSDL Models IBIS Models SERDES Software User's Guides
Design Resources Archives
FPGA Design Software
|
FPGA Development Kits & Boards
|
Power Analysis
|
Programming and Debug
|
IP Cores
Embedded Ecosystem
|
Partners
|
BSDL Models
|
IBIS Models
|
SERDES
| PCIe Demo Utility Installer | Utility Installer | 138 MB | 2/2015 |
Software User's Guides
| SmartFusion2 Standalone Peripheral Initialization User Guide | User Guide | 3.1 MB | 9/2014 |
| SmartFusion2/IGLOO2 FPGA Timing Constraints User's Guide | User Guide | 4.24 MB | 9/2014 |
| Batch Flow TCL for SmartFusion2 and IGLOO2 | User Guide | 1.5 MB | 9/2014 |
| SmartFusion2 and IGLOO2 Block Flow Users Guide | User Guide | 244 KB | 12/2013 |
| SmartFusion2 and IGLOO2 Tcl for SoC Documentation | User Guide | 868 KB | 4/2015 |
| SmartFusion2 FPGA Microcontroller Subsystem BFM Simulation Guide | User Guide | 483 KB | 4/2013 |
| SmartFusion2 MSS Embedded Nonvolatile Memory (eNVM) Simulation | User Guide | 603 KB | 8/2015 |
| SmartFusion2 MSS DDR Memory Simulation | User Guide | 1 MB | 1/2014 |
| SmartFusion2 FPGA SERDESIF Simulation User's Guide | User Guide | 617 KB | 6/2013 |
| SmartFusion2 System Builder User' s Guide | User Guide | 3/2016 |
Product Selector Guide
Microsemi SmartFusion2 SoC FPGAs Offer More Resources in Low-Density Devices with the Lowest Power, Proven Security, and Exceptional Reliability. SmartFusion2 SoC FPGAs offer 5K–150K LEs with a 166 MHz ARM Cortex-M3 processor, including ETM and instruction cache with on-chip eSRAM and eNVM, and a complete microcontroller subsystem with extensive peripherals, including CAN, TSE, and USB. These devices are ideal for general purpose functions such as Gigabit Ethernet or dual PCI Express control planes, bridging functions, input/output (I/O) expansion and conversion, video/image processing, system management, and secure connectivity.
.png&w=300&h=157&q=100 "Radar-EW RF Front End")
.png&w=300&h=157&q=100 "Storage Systems")
