RT PolarFire FPGAs
Enabling New Capabilities for Space
Overview
RT PolarFire FPGAs brings together 60 years of space flight heritage and the industry’s lowest power PolarFire FPGA family to enable new capabilities for space applications. With 481,000 logic elements, 33 Mbits of embedded SRAM, 1480 DSP blocks, and 24 lanes of 10 Gbps transceivers, our next generation radiation-tolerant FPGA enables higher computing and connectivity throughput for mission-critical systems at 40 to 50% lower power than competing SRAM FPGAs while delivering greater immunity to configuration Single Event Upsets (SEUs).
Low Power and High Reliability
Like the award winning PolarFire FPGA family, RT PolarFire uses low-power SONOS configuration switches embedded in a power-efficient architecture. The proof is in performance benchmarks which show PolarFire providing a total power savings of 40% to 50% relative to comparable SRAM FPGAs. The power savings achievable with RT PolarFire translates to a major cost-of-ownership saving, as it results in a simpler and less expensive power supply design, and the reduced heat output results in simpler and less expensive thermal management.
The SONOS configuration switches used in RT PolarFire have been shown to be robust to >100kRad of total dose exposure, indicating their suitability for the vast majority of earth-orbiting satellites and for many deep-space missions.
Over the course of many rounds of heavy-ion single event tests, the SONOS configuration switches have demonstrated an absence of configuration upsets, unlike SRAM FPGAs which do experience configuration upsets in space and require additional components in order to mitigate. The robust nature of the RT PolarFire configuration switches eliminates significant bill-of-material costs, power consumption, and system overhead associated with configuration scrubbing and repair which is needed with SRAM FPGAs.
RT PolarFire will be qualified to QML standards, including QML class V, the highest qualification and screening standard for monolithic integrated circuits in space.
QML Class V Package Design
RT PolarFire FPGA (RTPF500T) is a 481,000-logic element FPGA that will be available in a hermetically sealed ceramic column grid array package with 1,509 columns at 1.00mm pitch. It will feature integrated decoupling capacitors and is designed to support qualification to QML class V.
Get Started Now
The Libero SoC Design Suite supports commercial PolarFire FPGAs which can be used today to start design activity for the RT PolarFire FPGA. Libero SoC software includes synthesis support for TMR (triple module redundancy) which can be used for SEU mitigation. To run designs in hardware, designers can use the PolarFire FPGA Evaluation Kit (MPF300-EVAL-KIT)
Documents
Product Overview & Radiation Report
| RT PolarFire FPGA Product Overview |  |
1.41 MB | 10/2019 |
| RT PolarFire FPGA Radiation Report | |
858 kB | 2/2020 |
| Commercial PolarFire FPGA Documentation | |||
| CG1509 Package Pin Assignment Table | 204 kB | 5/2020 |
Design Resources
Space System Managers are companion devices that can be used with any Radiation-Tolerant FPGAs
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RT PolarFire FPGAs are fully supported by the Libero® SoC design suite that guides the user through the FPGA design flow and provides seamless design tool integration, as well as project, data file, and log file management.
Product Selector Guide
RT PolarFire FPGAs integrate our fifth-generation non-volatile low-power FPGA fabric with the industry's lowest power high-performance Serializer/Deserializer (SERDES) transceivers on a single chip while maintaining resistance to radiation-induced configuration upsets in the harshest radiation environments, such as space flight (LEO, MEO, GEO, HEO, and deep space) and high altitude aviation.
