ProASIC3
Overview
The ProASIC®3 series of FPGAs, which includes ProASIC3/e, ProASIC3 nano, and ProASIC3L, offers a breakthrough in performance, density, and features for today's most demanding high-volume applications. ProASIC3 devices support the ARM - Cortex-M1 soft processor IP core, offering the benefits of programmability and time-to-market. The ProASIC3 families are based on nonvolatile flash technology and support 100 to 35K LEs and up to 620 I/Os.
In addition to supporting portable, consumer, industrial, communications and medical applications with commercial and industrial temperature devices, we also offer ProASIC3 FPGAs with specialized screening for automotive and military systems.
ProASIC3 offers automotive grade devices that supports temperature range of grade 1 (Tj=135C) and are AEC-Q100 qualified. The auto grade devices supports 700 to 11K logic elements with up to 144 kbits of SRAM and up to 300 user I/Os.
ProASIC3 offers military grade devices with temperate range of -55C to 125C. The military grade devices supports 3K to 35K logic elements and 32-bit Cortex M1 soft processor implemented in the FPGA.
The ProASIC3 series includes:
Device Comparison
| ProASIC3 Series | ProASIC3\e | ProASIC3 nano | ProASIC3L |
|---|---|---|---|
| ARM Enabled | M1 ProASIC3/E | M1 ProASIC3L | |
| Overview | The low-power, low-cost FPGA solution | Lowest cost solution with enhanced I/O capabilities | The FPGA that balances low power, performance, and low cost |
| Equivalent LEs | 330-35K | 100-3K | 3K-35K |
| Max User I/Os | 620 | 71 | 620 |
| Power Consumption | 3 mW | 0.9 mW | 0.49 mW |
ProASIC3\e
The ProASIC®3 FPGA family offers high performance, density, and features required for today's most demanding high-volume applications. ProASIC3\e devices support the ARM Cortex-M1 Soft ProcessorIP cores, offering the benefits of programmability and time-to-market. The ProASIC3\e FPGAs are based on nonvolatile flash technology and support 330 to 35K LEs and up to 620 high-performance I/Os. In addition to supporting portable, consumer, industrial, communications and medical applications with commercial and industrial temperature devices, we also offer ProASIC3\e FPGAs with specialized screening for automotive and military systems.
The ProASIC3 family includes:
- ProASIC3, ProASIC3E
- ProASIC3 for Automotive
- ProASIC3 for Military
- M1 ProASIC3, M1 ProASIC3E
Key Features
- Low TOC (total cost of ownership)
- 1.5 V support
- Best system performance of 350 MHz
- Cost-optimized, reprogrammable, and nonvolatile
- Supports 128-bit AES decryption for device configuration
- Single chip and live at power-up
- 1,024 bits of user flash memory
- Immune to configuration loss due to atmospheric neutrons (firm errors)
- Available in automotive (T-Grade) and military temperature grade
Product Family - ProASIC3
Please refer to the ordering tab for a list of all available part numbers.
| ProASIC3 Devices | A3P030 | A3P060 | A3P125 | A3P250 | A3P400 | A3P600 | A3P1000 | |
|---|---|---|---|---|---|---|---|---|
| Cortex-M1 Devices | M1A3P250 | M1A3P400 | M1A3P600 | M1A3P1000 | ||||
| System Gates | 30,000 | 60,000 | 125,000 | 250,000 | 400,000 | 600,000 | 1,000,000 | |
| Equivalent LEs | 330 | 700 | 1.5 K | 3K | 5K | 7K | 11K | |
| RAM kbits (1,024 bits) | 18 | 36 | 36 | 54 | 108 | 144 | ||
| 4,608-Bit Blocks | 4 | 8 | 8 | 12 | 24 | 32 | ||
| FlashROM Bits | 1,024 | 1,024 | 1,024 | 1,024 | 1,024 | 1,024 | 1,024 | |
| Secure (AES) ISP1 | Yes | Yes | Yes | Yes | Yes | Yes | ||
| PLLs | 1 | 1 | 1 | 1 | 1 | 1 | ||
| I/O Standards | Std. & Hot Swap |
Std.+ | Std.+ | Std.+/ LVDS |
Std.+/ LVDS |
Std.+/ LVDS |
Std.+/ LVDS |
|
| I/O Banks (+JTAG) | 2 | 2 | 2 | 4 | 4 | 4 | 4 | |
| Maximum User I/Os | 77 | 96 | 133 | 157 | 178 | 235 | 300 | |
| Speed Grades | Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
Std., -1, -2 |
|
| Temperature Grades | C, I | C, I, T | C, I, T | C, I, T, M | C, I | C, I | C, I, T, M | |
| Single-Ended I/Os / Differential I/O Pairs | ||||||||
| QNG48 | 34 | |||||||
| QNG68 | 49 | |||||||
| VQG100 | 77 | 71 | 71 | 68/13 | ||||
| TQG144 | 91 | 100 | ||||||
| PQG208 | 133 | 151/34 | 151/34 | 154/35 | 154/35 | |||
| FGG144 | 96 | 97 | 97/24 | 97/25 | 97/25 | 97/25 | ||
| FGG256 |
157/382 | 178/38 | 177/43 | 177/44 | ||||
| FGG484 | 235/60 | 300/74 | ||||||
- Notes:
- AES not available for Cortex-M1 ProASIC3 devices.
- The M1A3P250 device does not support this package.
Product Family ProASIC3e
| ProASIC3E Devices | A3PE600 | A3PE1500 | A3PE3000 | |
|---|---|---|---|---|
| Cortex-M1 Devices | M1A3PE1500 | M1A3PE3000 | ||
| System Gates | 600,000 | 1,500,000 | 3,000,000 | |
| Equivalent LEs | 7K | 16K | 35K | |
| RAM kbits (1,024 bits) | 108 | 270 | 504 | |
| 4,608-Bit Blocks | 24 | 60 | 112 | |
| FlashROM Bits | 1,024 | 1,024 | 1,024 | |
| Secure (AES) ISP | Yes | Yes | Yes | |
| Integrated PLL in CCCs1 | 6 | 6 | 6 | |
| I/O Standards | Pro | Pro | Pro | |
| I/O Banks (+JTAG) | 8 | 8 | 8 | |
| Maximum User I/Os | 270 | 444 | 620 | |
| Speed Grades | Std., -1, -2 | Std., -1, -2 | Std., -1, -2 | |
| Temperature Grades | C, I | C, I | C, I | |
| Single-Ended I/O / Differential I/O Pairs | ||||
| PQG208 | 147/65 | 147/65 | ||
| FGG256 | 165/79 | |||
| FGG324 | 221/110 | |||
| FGG484 | 270/135 | 280/139 | 341/168 | |
| FGG676 | 444/222 | |||
| FGG896 | 620/310 | |||
- Notes:
- The PQ208 package has six CCCs and two PLLs.
Documents
Datasheets User's Guides & Manuals Application Notes Tutorials White Papers Product Information Brochures (PIB)
| DS0097: ProASIC3 Family Flash FPGAs Datasheet |  |
6.33 MB | 3/2016 |
| DS0098: ProASIC3E Flash Family FPGAs Datasheet | |
8.2 MB | 5/2020 |
| Automotive ProASIC3 Flash Family FPGAs Datasheet | |
7 MB | 2/2013 |
| Military ProASIC3/EL Low-Power Flash FPGAs Datasheet | |
6 MB | 10/2018 |
| ProASIC3 Pin Assignment Tables | ProASIC3E Pin Assignment Tables |
|
|
User's Guides and Manuals
| Automotive ProASIC3 FPGA Fabric User's Guide | |
24 MB | 9/2012 |
| IGLOO, ProASIC3, SmartFusion and Fusion Macro Library Guide for Software v10.1 | |
1 MB | 11/2012 |
| Military ProASIC3/EL FPGA Fabric User's Guide | |
24 MB | 9/2012 |
| ProASIC3 FPGA Fabric User's Guide | |
24 MB | 9/2012 |
ProASIC3/E Starter Kit Quickstart Card
|
|
220 KB | 11/2012 |
| ProASIC3E FPGA Fabric User's Guide | |
21 MB | 9/2012 |
| SmartGen Cores Reference Guide for Software v11.0 | |
3 MB | 4/2013 |
| ProASIC3/E Proto Kit Quickstart Card | |
202 KB | 11/2012 |
ProASIC3/E Starter Kit User's Guide
|
|
2 MB | 11/2012 |
ProASIC3/E Proto Kit User's Guide and Tutorial
|
|
6 MB | 11/2012 |
| DC-DC Regulator Guide for Microsemi FPGAs and SoC FPGAs | |
379 KB | 3/2013 |
| TU0308: ARM Cortex-M1 Embedded Processor Tutorial |
|
3.5 MB | 6/2017 |
White Papers
Product Information Brochures (PIB)
| IGLOO Low-Power Flash FPGAs Brochure | 1.28 MB | 3/2020 |
Design Resources
| Design Software |
|
|---|---|
| Request a License |
|
| Packaging | |
| Design Hardware |
|
| Programming & Debug |
|
| IP Cores | |
| Handbook | |
| Embedded Ecosystem |
|
| Partners |
|
| Power Analysis |
|
| IBIS Models |
|
| BSDL Models |
|
ProASIC3 nano
The ProASIC3 nano nonvolatile FPGAs offer the advantage of being a secure, low power, instant-on,single-chip solution.ProASIC3 nano devices are reprogrammable and offer time-to-market benefits.When measured against the typical project metrics of performance, cost, flexibility and time to market, the ProASIC3 nano devices provide an attractive alternative to ASICs and application-specific standard products (ASSPs) in fast moving or highly competitive markets.ProASIC3 nano devices have up to 3K LEs, supported up to 36 kbits of true dual-port SRAM and up to 71 user I/Os.
ProASIC3 nano devices increase the breadth of the ProASIC3 product line by adding new features and packages for greater customer value in high volume consumer, portable, and battery-backed markets. Added features include smaller footprint packages designed with two-layer PCBs in mind, low power, hot-swap capability, and Schmitt trigger for greater flexibility in low-cost and power-sensitive applications.
Key Features
- Wide selection of small footprint packages
- Enhanced commercial temperature range
- Selectable Schmitt trigger inputs
- Hot-swappable and cold-sparing I/Os
- Reprogrammable and nonvolatile
- 1,024 bits of user flash memory
- Single-chip and Instant-ON
- In-system programming (ISP) and security
For higher densities and additional features, refer to the ProASIC3\e FPGAs.
Product Family-ProASIC3 nano
Please refer to the ordering tab for a list of all available part numbers.
| ProASIC3 nano Devices | A3PN010 | A3PN020 | A3PN060 | A3PN125 | A3PN250 | |
|---|---|---|---|---|---|---|
| System Gates | 10,000 | 20,000 | 60,000 | 125,000 | 250,000 | |
| Equivalent LEs | 100 | 200 | 700 | 1.5 K | 3K | |
| RAM kbits (1,024 bits) |
18 | 36 | 36 | |||
| 4,608-Bit Blocks |
4 | 8 | 8 | |||
| FlashROM Bits | 1,024 | 1,024 | 1,024 | 1,024 | 1,024 | |
| Secure (AES) ISP |
Yes | Yes | Yes | |||
| Integrated PLLs in CCCs |
1 | 1 | 1 | |||
| I/O Standards | Std., Hot Swap | Std., Hot Swap | Std., Hot Swap | Std., Hot Swap | Std., Hot Swap | |
| I/O Banks (+JTAG) | 2 | 3 | 2 | 2 | 4 | |
| Maximum User I/Os | 34 | 49 | 71 | 71 | 68 | |
| Speed Grades | Std., -1, -2 | Std., -1, -2 | Std., -1, -2 | Std., -1, -2 | Std., -1, -2 | |
| Temperature Grades | C, I | C, I | C, I | C, I | C, I | |
| Single-Ended I/O | ||||||
| QNG48 (6x6 mm) | 34 | |||||
| QNG68 (8x8 mm) | 49 | |||||
| VQG100 (14x14 mm) | 71 | 71 | 68 | |||
Documents
Datasheets User's Guides & Manuals Application Notes White Papers Product Information Brochures (PIB)
| DS0111: ProASIC3 nano Flash FPGAs Datasheet | |
5.5MB | 05/2020 |
Pin Assignment Tables
|
| ProASIC3 nano FPGA Fabric User's Guide | |
20 MB | 9/2012 |
| DC-DC Regulator Guide for Microsemi FPGAs and SoC FPGAs | |
379 KB | 3/2013 |
Product Information Brochures (PIB)
| IGLOO Low-Power Flash FPGAs Brochure | 1.28 MB | 3/2020 |
Design Resources
| Design Software |
|
|---|---|
| Request a License |
|
| Packaging | |
| Design Hardware |
|
| Design Hardware | |
| IP Cores | |
| Partners |
|
| Power Analysis |
|
| IBIS Models |
|
| BSDL Models |
|
ProASIC3L
ProASIC3®L low-power FPGAs feature lower dynamic and static power than ProASIC3 FPGAs .The ProASIC3L family also supports the free implementation of an FPGA-optimized 32-bit ARM Cortex-M1 Processor, allowing system designers to select the flash FPGA solution that best meets their speed and power design requirements. In addition to supporting portable, consumer, industrial, communications, and medical applications with commercial and industrial temperature devices, we also offer ProASIC3EL FPGAs with specialized screening for military systems.
The ProASIC3L family includes:
- ProASIC3L, ProASIC3EL
- M1 ProASIC3L, M1 ProASIC3EL
- ProASIC3EL for Military
Key Features
- More dynamic power savings
- More static power savings
- Single-chip, single-voltage operation and Instant-ON
- Optimized for high performance
- Reprogrammable, and nonvolatile
- 1.2 V to 1.5 V core voltage support
- Wide range of I/O voltage support from 1.2 V
- Innovative Flash*Freeze technology for instantaneous switching from active to static mode
- Free Cortex-M1 (ARM FPGA Processor) support for all devices
- In-System Programming (ISP) with optional on-chip AES decryption
- Immune to configuration loss due to atmospheric neutrons (firm errors)
- Available in military temperature grade
Product Family
Please refer to the ordering tab for a list of all available part numbers.
| ProASIC3L Devices | A3P600L | A3P1000L | A3PE600L1 | A3PE3000L |
|---|---|---|---|---|
| Cortex-M1 Devices | M1A3P600L | M1A3P1000L | M1A3PE3000L | |
| System Gates | 600,000 | 1,000,000 | 600,000 | 3,000,000 |
| Equivalent LEs | 7K | 11K | 7K | 35K |
| RAM kbits (1,024 bits) | 108 | 144 | 108 | 504 |
| 4,608-Bit Blocks | 24 | 32 | 24 | 112 |
| FlashROM Bits | 1,024 | 1,024 | 1,024 | 1,024 |
| Secure (AES) ISP1 | Yes | Yes | Yes | Yes |
| Integrated PLLs in CCCs2 | 1 | 1 | 6 | 6 |
| I/O Standards | Std.+/LVDS | Std.+/LVDS | Pro | Pro |
| I/O Banks (+JTAG) | 4 | 4 | 8 | 8 |
| Maximum User I/Os | 235 | 177 | 270 | 620 |
| Typical Static / Flash*Freeze Power (mW) at VCC=1.2 V | 0.66 | 1.06 | TBA | 3.30 |
| Speed Grades | Std., -1 | Std., -1 | Std., -1 | Std., -1 |
| Temperature Grades | C, I | C, I | M | C, I, M |
| Single-Ended I/Os / Differential I/O Pairs | ||||
| PQG208 | 147/653 | |||
| FGG144 | 97/25 | 97/25 | ||
| FGG256 | 177/44 | |||
| FGG324 | 221/110 | |||
| FGG4844 | 235/60 | 270/135 | 341/168 | |
| FGG8964 | 620/310 | |||
- Notes:
- A3PE600L is only offered in military grade. Please refer to the Military ProASIC3/EL Low-Power FPGAs Datasheet for device information.
- AES is not available for Cortex-M1 ProASIC3L devices.
- For the A3PE3000L, the PQ208 package has six CCCs and two PLLs.
- Packages offered in Mil grade as well.
Documents
Datasheets User's Guides & Manuals Application Notes Tutorials White Papers Product Information Brochures (PIB)
| DS0100: ProASIC3L Low Power Flash FPGAs Datasheet | |
9.96 MB | 5/2020 |
| Military ProASIC3/EL Low-Power Flash FPGAs Datasheet | |
9 MB | 10/2012 |
| PDN17016: Low-Volume SOC part numbers | |
0.6 MB | 4/2017 |
| PDN17016: Low-Volume SoC Part Numbers (Addendum) | |
0.5 MB | 5/2017 |
| CN17025: Extending Product Lifecycles with Arrow Supply Assurance | |
0.1 MB | 6/2017 |
Pin Assignment Tables
|
| Military ProASIC3/EL FPGA Fabric User's Guide | |
24 MB | 9/2012 |
| ProASIC3L FPGA Fabric User's Guide | |
24 MB | 9/2012 |
| DC-DC Regulator Guide for Microsemi FPGAs and SoC FPGAs | |
379 KB | 3/2013 |
| TU0308: ARM Cortex-M1 Embedded Processor Tutorial |
|
3.5 MB | 6/2017 |
| IGLOO Low-Power Flash FPGAs Brochure | 1.28 MB | 3/2020 |
Design Resources
| Design Software |
|
|---|---|
| Request a License |
|
| Packaging | |
| Design Hardware |
|
| Programming & Debug |
|
| IP Cores | |
| Partners |
|
| Power Analysis |
|
| IBIS Models |
|
| BSDL Models |
|
Product Selector Guide
ProASIC3\e:
The ProASIC3 series of flash FPGAs offers a breakthrough in power, performance, density, and features for today’s most demanding high-volume applications. ProASIC3 devices support the ARM Cortex-M1 processor, offering the benefits of programmability and time-to-market at low cost. ProASIC3 devices are based on nonvolatile flash technology and support 330–35K logic elements and up to 620 high-performance I/Os. For automotive applications, selected ProASIC3 devices are qualified to AEC-Q100 and are available with AEC T1 screening and PPAP documentation.
ProASIC3 Nano:
Microsemi’s innovative ProASIC3 nano devices bring a new level of value and flexibility to high-volume markets. When measured against the typical project metrics of performance, cost, flexibility, and time-to-market, ProASIC3 nano devices provide an attractive alternative to ASICs and ASSPs in fast-moving or highly competitive markets. Customer-driven total-system cost reduction was a key design criteria for the ProASIC3 nano program. Single-chip implementation and a broad selection of small footprint packages contribute to lower total system costs.
ProASIC3 L:
ProASIC3L FPGAs feature lower dynamic and static power requirements than the previous generation of ProASIC3 FPGAs, and lower power requirements by orders of magnitude than SRAM competitors, combining dramatically reduced power consumption with up to 350 MHz operation. The ProASIC3L family also supports the free implementation of an FPGA-optimized 32-bit ARM Cortex-M1 processor, enabling system designers to select the Microsemi flash FPGA solution that best meets their speed and power requirements, regardless of application or volume. Optimized software tools using power-driven layout (PDL) provide instant power reduction capabilities.
