ProASIC3

Overview

The ProASIC®3 series of FPGAs, which includes ProASIC3/e, ProASIC3 nano, and ProASIC3L, offers a breakthrough in performance, density, and features for today's most demanding high-volume applications. ProASIC3 devices support the ARM - Cortex-M1 soft processor IP core, offering the benefits of programmability and time-to-market. The ProASIC3 families are based on nonvolatile flash technology and support 100 to 35K LEs and up to 620 I/Os.

In addition to supporting portable, consumer, industrial, communications and medical applications with commercial and industrial temperature devices, we also offer ProASIC3 FPGAs with specialized screening for automotive and military systems.

ProASIC3 offers automotive grade devices that supports temperature range of grade 1 (Tj=135C) and are AEC-Q100 qualified. The auto grade devices supports 700 to 11K logic elements with up to 144 kbits of SRAM and up to 300 user I/Os.
ProASIC3 offers military grade devices with temperate range of -55C to 125C. The military grade devices supports 3K to 35K logic elements and 32-bit Cortex M1 soft processor implemented in the FPGA.

The ProASIC3 series includes:

ProASIC3\e
- With ARM Cortex-M1 Processor

ProASIC3 nano

ProASIC3L
- With ARM Cortex-M1 Processor

Device Comparison

ProASIC3 Series	ProASIC3\e	ProASIC3 nano	ProASIC3L
ARM Enabled	M1 ProASIC3/E		M1 ProASIC3L
Overview	The low-power, low-cost FPGA solution	Lowest cost solution with enhanced I/O capabilities	The FPGA that balances low power, performance, and low cost
Equivalent LEs	330-35K	100-3K	3K-35K
Max User I/Os	620	71	620
Power Consumption	3 mW	0.9 mW	0.49 mW

ProASIC3\e

ProASIC3 FPGA The ProASIC®3 FPGA family offers high performance, density, and features required for today's most demanding high-volume applications. ProASIC3\e devices support the ARM Cortex-M1 Soft ProcessorIP cores, offering the benefits of programmability and time-to-market. The ProASIC3\e FPGAs are based on nonvolatile flash technology and support 330 to 35K LEs and up to 620 high-performance I/Os. In addition to supporting portable, consumer, industrial, communications and medical applications with commercial and industrial temperature devices, we also offer ProASIC3\e FPGAs with specialized screening for automotive and military systems.

The ProASIC3 family includes:

ProASIC3, ProASIC3E
ProASIC3 for Automotive

ProASIC3 for Military
M1 ProASIC3, M1 ProASIC3E

Key Features

Low TOC (total cost of ownership)
1.5 V support
Best system performance of 350 MHz
Cost-optimized, reprogrammable, and nonvolatile
Supports 128-bit AES decryption for device configuration
Single chip and live at power-up
1,024 bits of user flash memory
Immune to configuration loss due to atmospheric neutrons (firm errors)
Available in automotive (T-Grade) and military temperature grade

Product Family - ProASIC3

Please refer to the ordering tab for a list of all available part numbers.

ProASIC3 Devices	A3P030	A3P060	A3P125	A3P250	A3P400	A3P600	A3P1000
Cortex-M1 Devices				M1A3P250	M1A3P400	M1A3P600	M1A3P1000
System Gates	30,000	60,000	125,000	250,000	400,000	600,000	1,000,000
Equivalent LEs	330	700	1.5 K	3K	5K	7K	11K
RAM kbits (1,024 bits)		18	36	36	54	108	144
4,608-Bit Blocks		4	8	8	12	24	32
FlashROM Bits	1,024	1,024	1,024	1,024	1,024	1,024	1,024
Secure (AES) ISP¹		Yes	Yes	Yes	Yes	Yes	Yes
PLLs		1	1	1	1	1	1
I/O Standards	Std. & Hot Swap	Std.+	Std.+	Std.+/ LVDS	Std.+/ LVDS	Std.+/ LVDS	Std.+/ LVDS
I/O Banks (+JTAG)	2	2	2	4	4	4	4
Maximum User I/Os	77	96	133	157	178	235	300
Speed Grades	Std., -1, -2	Std., -1, -2	Std., -1, -2	Std., -1, -2	Std., -1, -2	Std., -1, -2	Std., -1, -2
Temperature Grades	C, I	C, I, T	C, I, T	C, I, T, M	C, I	C, I	C, I, T, M
Single-Ended I/Os / Differential I/O Pairs
QNG48	34
QNG68	49
VQG100	77	71	71	68/13
TQG144		91	100
PQG208			133	151/34	151/34	154/35	154/35
FGG144		96	97	97/24	97/25	97/25	97/25
FGG256				157/38²	178/38	177/43	177/44
FGG484						235/60	300/74

Notes:

AES not available for Cortex-M1 ProASIC3 devices.
The M1A3P250 device does not support this package.
For Part availability please refer to PDN and EOL notifications.

Product Family ProASIC3e

ProASIC3E Devices	A3PE600	A3PE1500	A3PE3000
Cortex-M1 Devices		M1A3PE1500	M1A3PE3000
System Gates	600,000	1,500,000	3,000,000
Equivalent LEs	7K	16K	35K
RAM kbits (1,024 bits)	108	270	504
4,608-Bit Blocks	24	60	112
FlashROM Bits	1,024	1,024	1,024
Secure (AES) ISP	Yes	Yes	Yes
Integrated PLL in CCCs¹	6	6	6
I/O Standards	Pro	Pro	Pro
I/O Banks (+JTAG)	8	8	8
Maximum User I/Os	270	444	620
Speed Grades	Std., -1, -2	Std., -1, -2	Std., -1, -2
Temperature Grades	C, I	C, I	C, I
Single-Ended I/O / Differential I/O Pairs
PQG208		147/65	147/65
FGG256	165/79
FGG324			221/110
FGG484	270/135	280/139	341/168
FGG676		444/222
FGG896			620/310

Notes:

The PQ208 package has six CCCs and two PLLs.
For Part availability please refer to PDN and EOL notifications.

Documents

Datasheets User's Guides & Manuals Application Notes Tutorials
White Papers Product Information Brochures (PIB)

Datasheets

Microsemi content is being moved to microchip.com. We will post new documents and downloads on microchip.com. Please visit our documentation landing page on microchip.com to access the latest documentation and downloads. The link will take you to a landing page where you can navigate to the product you are looking for. If you have any further questions, please reach out to FPGA_marketing@microchip.com

DS0097: ProASIC3 Family Flash FPGAs Datasheet	6.33 MB	3/2016
DS0098: ProASIC3E Flash Family FPGAs Datasheet	8.2 MB	5/2020
Automotive ProASIC3 Flash Family FPGAs Datasheet	7 MB	2/2013
Military ProASIC3/EL Low-Power Flash FPGAs Datasheet	6 MB	10/2018

ProASIC3 Pin Assignment Tables

ProASIC3E Pin Assignment Tables

ProASIC3 QN48 Pinouts (ZIP, 7/2014)
ProASIC3 QN68 Pinouts (ZIP, 7/2014)
ProASIC3 CS81 Pinouts (ZIP, 7/2014)
ProASIC3 VQ100 Pinouts (ZIP, 7/2014)
ProASIC3 CS121 Pinouts (ZIP, 7/2014)
ProASIC3 FG144 Pinouts (ZIP, 7/2014)
ProASIC3 TQ144 Pinouts (ZIP, 7/2014)
ProASIC3 CS196 Pinouts (ZIP, 7/2014)
ProASIC3 CQ208 Pinouts (ZIP, 7/2014)
ProASIC3 PQ208 Pinouts (ZIP, 7/2014)
ProASIC3 FG256 Pinouts (ZIP, 7/2014)
ProASIC3 FG484 Pinouts (ZIP, 7/2014)

ProASIC3E CQ208 Pinouts (ZIP, 7/2014)
ProASIC3E PQ208 Pinouts (ZIP, 7/2014)
ProASIC3E FG256 Pinouts (ZIP, 7/2014)
ProASIC3E FG324 Pinouts (ZIP, 7/2014)
ProASIC3E FG484 Pinouts (ZIP, 7/2014)
ProASIC3E FG676 Pinouts (ZIP, 7/2014)
ProASIC3E FG896 Pinouts (ZIP, 7/2014)

User's Guides and Manuals

Automotive ProASIC3 FPGA Fabric User's Guide	24 MB	9/2012
IGLOO, ProASIC3, SmartFusion and Fusion Macro Library Guide for Software v10.1	1 MB	11/2012
Military ProASIC3/EL FPGA Fabric User's Guide	24 MB	9/2012
ProASIC3 FPGA Fabric User's Guide	24 MB	9/2012
ProASIC3/E Starter Kit Quickstart Card Programming Files(ZIP, 114 KB, 10/12)	220 KB	11/2012
ProASIC3E FPGA Fabric User's Guide	21 MB	9/2012
SmartGen Cores Reference Guide for Software v11.0	3 MB	4/2013
ProASIC3/E Proto Kit Quickstart Card	202 KB	11/2012
ProASIC3/E Starter Kit User's Guide Design Files(ZIP, 2.1 MB, 10/12)	2 MB	11/2012
ProASIC3/E Proto Kit User's Guide and Tutorial Design Files(ZIP, 670 KB, 9/10)	6 MB	11/2012
DC-DC Regulator Guide for Microsemi FPGAs and SoC FPGAs	379 KB	3/2013

Application Notes

AC214: Embedded SRAM Initialization Using External Serial EEPROM App Note Design Files (ZIP, 14.5 KB, 1/05)	386 KB	11/2008
AC215: Using IGLOO and ProASIC3 FIFO for Generating Periodic Waveforms App Note	614 KB	08/2015
AC223: Designing a MIL-STD-1553 System Using Core1553 and Core8051 App Note VHDL: Design Files - SFR (ZIP, 6 KB, 1/05) Design Files - direct memory access (ZIP, 13 KB, 4/05) Verilog: Design Files - SFR (ZIP, 6 KB, 1/05) Design Files - direct memory access (ZIP, 11 KB, 4/05)	144 KB	4/2005
AC222: Using Fusion, IGLOO, and ProASIC3 RAM as Multipliers App Note	853 KB	08/2015
AC246: Level Shifter Design Example App Note Design Files (ZIP, 15 KB, 04/09)	350 KB	4/2009
AC257: Microcontroller I/O Expander Design Example App Note Design Files (ZIP, 1.8 MB, 04/09)	762 KB	4/2009
AC265: Clock Generation and Distribution Design Example App Note Design Files (ZIP, 192 KB, 04/09)	592 KB	11/2012
AC268: Using IGLOO and ProASIC3 FPGAs as a System Power Sequencer Design Example App Note Design Files (ZIP, 3 MB, 04/09)	981 KB	08/2015
AC269: Implementing an OLED Controller Parallel Interface Design Example App Note Design Files (ZIP, 609 KB, 04/09)	841 KB	08/2015
AC276: Board Level Considerations for Microsemi FPGAs App Note	883.7 KB	8/2012
AC311: Physical Interface to QDRII Memories using Microsemi ProASIC3E FPGAs App Note	522 KB	1/2008
AC323: Dynamic Power Reduction in Flash FPGAs App Note	2 MB	10/2012
AC326: GPIO Expansion Using UART Design Example App Note Design Files (ZIP, 4.9 MB, 04/09)	501 KB	4/2009
AC327: UART-to-SPI Interface Design Example App Note Design Files (ZIP, 375 KB, 04/09)	738 KB	10/2012
AC328: NAND Flash Interface Design Example App Note Design Files (ZIP, 2.5 MB, 06/09)	679 KB	6/2009
AC329: Mobile SDRAM Interface Design Example App Note Design Files (ZIP, 587 KB, 06/09)	587 KB	6/2009
AC330: Smart Card Interface Design Example App Note Design Files (ZIP, 3.6 MB, 06/09)	1 MB	6/2009
AC349: Bidirectional Level Shifter App Note Design Files (ZIP, 2.1 KB, 2/11)	396 KB	4/2011
AC357: FlashPro4 Backward Compatibility with FlashPro3 App Brief	448 KB	10/2012
AC373: Source-Synchronous Clock Designs: Timing Constraints and Analysis App Note Design Files (ZIP, 5.1 MB, 11/11)	2 MB	11/2011
AC374: Simultaneous Read-Write Operations in Dual-Port SRAM for Flash-Based FPGAs and SoC FPGAs App Note	2 MB	9/2011
AC379: Advanced Static Timing Analysis Using SmartTime App Note	6 MB	11/2011
AC380: Internal Power-on Reset and Post Programming Reset Circuit for Flash-Based FPGAs App Note Design Files (RAR, 10.9 MB, 11/12)	541 KB	2/2012
AC382: Zeroization App note Design Files (RAR, 14.8 MB, 11/12) Programming Files (RAR, 177 KB, 5/12)	597 KB	3/2012
Designing for Performance on Flash-Based FPGAs	764 KB	3/2008
HB: Low-Power Modes in Microsemi ProASIC3/E FPGAs (v1.2)	432 KB	8/2009
HB: Power-Up/-Down Behavior of Low-Power Flash Devices (v1.2)	686 KB	12/2011
HB: ProASIC3/E SSO and Pin Placement Guidelines (v1.0)	803 KB	9/2012

Tutorials

TU0308: ARM Cortex-M1 Embedded Processor Tutorial

3.5 MB

6/2017

White Papers

Putting Low Power and Flexibility Where It Matters Most: Handheld Portable Applications White Paper		8/2012
FPGA Reliability and the Sunspot Cycle White Paper		9/2011
Size, Reliability and Security: The Essential Ingredients for Medical Devices White Paper		8/2011
Secure Foundations White Paper		12/2010
Single-Event Upsets (SEUs) and Medical Devices White Paper	1.28 MB	12/2010
Incredible Shrinking Medical Devices White Paper	316 KB	10/2008
The Many Flavors of Low-Power, Low-Cost FPGAs White Paper	517 KB	4/2008
The Advantages of the 32-Bit Cortex-M1 Processor in Microsemi FPGAs White Paper	1011 KB	08/2015
ProASIC3/E Production FPGAs Features and Advantages White Paper	271 KB	1/2007
Flash FPGAs in the Value-Based Market White Paper	65 KB	1/2005

Product Information Brochures (PIB)

IGLOO Low-Power Flash FPGAs Brochure

1.28 MB

3/2020

Design Resources

Design Software	Libero SoC Design Software integrates industry leading synthesis, debug and DSP support from Synopsys, and simulation from Siemens with power analysis, timing analysis and push button design flow.
Request a License	Free full feature licenses are available for all family members.
Packaging	Microsemi Packaging Resources and Information
Design Hardware	The ProASIC3 Starter Kit provide complete evaluation solutions that enable quick evaluation and design prototyping of Microsemi ProASIC3 and Cortex-M1-enabled ProASIC3 low-cost, low-power FPGAs.
Programming & Debug	ProASIC3\e FPGAs are supported by FlashPro for in circuit programming and Silicon Sculptor 3 for standalone device programming.
IP Cores	Search for ProASIC3/e IP cores
Handbook	Cortex-M1 Handbook
Embedded Ecosystem	The ProASIC3 Embedded Ecosystem includes a number of partners who provide third party tools, firmware and middleware.
Partners	Many of Microsemi’s Partners are engaged in development with ProASIC3 devices
Power Analysis	Leverage our Excel based ProASIC3/e power calculator to evaluate power for your design without running through the full design flow. SmartPower can also provide design specific power analysis for your design implementation within Libero.
IBIS Models	Generic ProASIC3/e IBIS Models are available for signal integrity simulations. Design specific files can also be exported from your design implementation in Libero.
BSDL Models	Generic BSDL Models are available for boundary scan testing: ProASIC3 FPGAs ProASIC3e FPGAs Design specific files can also be exported from your design implementation in Libero.

ProASIC3 nano

The ProASIC3 nano nonvolatile FPGAs offer the advantage of being a secure, low power, instant-on,single-chip solution.ProASIC3 nano devices are reprogrammable and offer time-to-market benefits.When measured against the typical project metrics of performance, cost, flexibility and time to market, the ProASIC3 nano devices provide an attractive alternative to ASICs and application-specific standard products (ASSPs) in fast moving or highly competitive markets.ProASIC3 nano devices have up to 3K LEs, supported up to 36 kbits of true dual-port SRAM and up to 71 user I/Os.
ProASIC3 nano devices increase the breadth of the ProASIC3 product line by adding new features and packages for greater customer value in high volume consumer, portable, and battery-backed markets. Added features include smaller footprint packages designed with two-layer PCBs in mind, low power, hot-swap capability, and Schmitt trigger for greater flexibility in low-cost and power-sensitive applications.