IGLOO
Overview
The Industry's Low-Power FPGAs
The IGLOO® series of ultra-low density FPGAs includes IGLOO/e, IGLOO nano and IGLOO PLUS —the industry's low-power FPGAs. IGLOO FPGA family are designed to meet the demand of low power and small foot print requirements of today's portable and power-conscious electronics.
The IGLOO low-power FPGA family support up to 35K logic elements with up to 504 kbits of true dual-port SRAM, up to 6 embedded PLLs, and up to 620 user I/Os. Low-power applications that require 32-bit processing can use the ARM ® Cortex-M1 processor without license fee or royalties in M1 IGLOO devices.
The IGLOO FPGA family devices are available in small footprint (3x3, 4x4, 5x5, 6x6 and 8x8 mm), high
density, chip-scale and quad flat no-lead packages.
The IGLOO series includes:
Device Comparison
IGLOO Family | IGLOO/e | IGLOO nano | IGLOO PLUS |
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ARM - Enabled | M1 IGLOO/e | ||
Overview | The low-power programmable solution | The industry's lowest-power, smallest-size solution | The low-power FPGA with more I/O per LE compared to IGLOO |
Equivalent LEs | 330-35K | 100-3K | 330-1K |
Max User I/Os | 341 | 71 | 212 |
Power Consumption | 5 µW | 2 µW | 5 µW |
Flash*Freeze Technology
The Flash*Freeze technology used in IGLOO devices enables easy entry and exit from low power mode which consumes as little as 2 µW, while retaining SRAM and register data. Flash*Freeze technology simplifies power management through I/O and clock management without a need to turn off voltages, I/Os, or clocks at the system level.In Flash*Freeze mode, power drops to as low as 2 µW, and no additional components are required to turn off I/Os or clocks while preserving the design information, SRAM content, and registers. I/Os can maintain their state during Flash*Freeze mode. Entering and exiting Flash*Freeze mode takes less than 1 µs.
Small Footprint Packages
IGLOO FPGAs are true single-chip devices, do not require configuration or other support components, and offer a variety of small-footprint packages with high I/O pin count to match design needs.The IGLOO family is offered in a small form factor (3x3, 4x4, 5x5, 6x6, and 8x8 mm), high-density, chip-scale packages and quad flat no-lead packages.
IGLOO/e
The IGLOO/e family of low-power flash FPGAs, based on a 130-nm flash process, a single-chip solution, small footprint packages, reprogrammability, and an abundance of advanced features.
The Flash*Freeze technology used in IGLOO/e devices enables entering and exiting an ultra-low power mode while retaining SRAM and register data. Flash*Freeze technology simplifies power management through I/O and clock management with rapid recovery to operation mode.
IGLOO/e devices offer 1 kbit of on-chip, programmable, nonvolatile FlashROM storage as well as clock conditioning circuitry based on 6 integrated phase-locked loops (PLLs). IGLOO/e devices have up to 35K LEs, supported with up to 504 kbits of true dual-port SRAM and up to 620 user I/Os.
M1 IGLOO/e devices support the high-performance, 32-bit ARM® - Cortex-M1™ Processor developed by ARM for implementation in FPGAs. Cortex-M1 is available for free from Microsemi for use in M1 IGLOO/e FPGAs.
The IGLOO family includes:
- IGLOO
- M1 IGLOO : ARM® - Cortex-M1 enabled IGLOO devices
The IGLOOe family includes:
- IGLOOe
- M1 IGLOOe : ARM® - Cortex-M1 enabled IGLOOe devices
Key Features
- Low power in Flash*Freeze mode
- Best system performance of 250 MHz
- Low power active capability
- Small footprint packages
- Reprogrammable flash technology
- 1.2 V to 1.5 V operation
- High-capacity, advanced I/Os
- Clock conditioning circuits (CCCs) and PLLs
- Embedded SRAM and nonvolatile memory (NVM)
- In-system programming (ISP) and security
Product Family
Please refer to the ordering tab for a list of all available part numbers.
IGLOO Devices | AGL030 | AGL060 | AGL125 | AGL250 | AGL400 | AGL600 | AGL1000 | AGLE600 | AGLE3000 |
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Cortex-M1 Devices | M1AGL250 | M1AGL600 | M1AGL1000 | M1AGLE3000 | |||||
System Gates | 30,000 | 60,000 | 125,000 | 250,000 | 400,000 | 600,000 | 1,000,000 | 600,00 | 3,000,000 |
Equivalent LEs | 330 | 700 | 1.5 K | 3K | 5K | 7K | 11K | 7K | 35K |
Quiescent Current (typical)in Flash*Freeze Mode( µW) | 5 | 10 | 16 | 24 | 32 | 36 | 53 | 49 | 137 |
RAM kbits (1,024 bits) |
18 | 36 | 36 | 54 | 108 | 144 | 108 | 504 | |
4,608-Bit Blocks | 4 | 8 | 8 | 12 | 24 | 32 | 24 | 112 | |
FlashROM Bits | 1,024 | 1,024 | 1,024 | 1,024 | 1,024 | 1,024 | 1,024 | 1024 | 1024 |
Secure (AES) ISP1 | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | |
Integrated PLLs in CCCs2 |
1 | 1 | 1 | 1 | 1 | 1 | 6 | 6 | |
I/O Standards | Std., Hot-Swap |
Std.+ | Std.+ | Std.+/ LVDS |
Std.+/ LVDS |
Std.+/ LVDS |
Std.+/ LVDS |
Pro | Pro |
I/O Banks (+JTAG) | 2 | 2 | 2 | 4 | 4 | 4 | 4 | 8 | 8 |
Maximum User I/Os | 77 | 71 | 133 | 143 | 178 | 215 | 300 | 165 | 341 |
Speed Grades | Std. | Std. | Std. | Std. | Std. | Std. | Std. | Std. | Std. |
Temperature Grades | C, I | C, I | C, I | C, I | C, I | C, I | C, I | C,I | C,I |
Notes:
- AES is not available for ARM-enabled IGLOO devices.
- AGL060 in CS121 does not support the PLL.
Packing and I/Os
IGLOO Devices | AGL030 | AGL060 | AGL125 | AGL250 | AGL400 | AGL600 | AGL1000 | AGLE600 | AGLE3000 |
Cortex-M1 Devices | M1AGL250 | M1AGL600 | M1AGL1000 | M1AGLE3000 | |||||
QNG48 | 34 | ||||||||
UCG81 | 66 | ||||||||
CSG81 | 66 | ||||||||
CSG121 | 96 | ||||||||
VQG100 | 77 | 71 | 71 | 68/13 | |||||
CSG196 | 133 | 143/353 | 143/35 | ||||||
FGG144 | 97 | 97/24 | 97/25 | 97/25 | |||||
FGG2562 | 178/38 | 177/43 | 177/44 | 165/79 | |||||
CSG281 | 215/53 | 215/53 | |||||||
FGG4842 | 300/74 | 341/168 |
Notes:
- Each used differential I/O pair reduces the number of single-ended I/Os available by two.
- FG256 and FG484 are footprint-compatible packages.
- The M1AGL250 device does not support CS196 package.
- For AGLE3000 devices, the usage of certain I/O standards is limited as follows: – SSTL3(I) and (II): up to 40 I/Os per north or south bank – LVPECL / GTL+ 3.3 V / GTL 3.3 V: up to 48 I/Os per north or south bank – SSTL2(I) and (II) / GTL+ 2.5 V/ GTL 2.5 V: up to 72 I/Os per north or south bank
- When using voltage-referenced I/O standards, one I/O pin should be assigned as a voltage-referenced pin (VREF) per minibank (group of I/Os).
- When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not as a regular I/O, the number of single-ended user I/Os available is reduced by one.
- "G" indicates RoHS-compliant packages. See Ordering Information
Documents
Datasheets
User's Guides & Manuals
Application Notes
Application Briefs
Tutorials
White Papers
Product Information Brochures (PIB)
Other Information
Datasheets
DS0095: IGLOO Low Power Flash FPGAs Datasheet | ![]() |
5.8 MB | 5/2016 |
IGLOOe Low-Power Flash FPGAs Datasheet | ![]() |
2.7 MB | 05/2020 |
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User's Guides and Manuals
IGLOO FPGA Fabric User's Guide | ![]() |
21 MB | 9/2012 |
IGLOO, ProASIC3, SmartFusion and Fusion Macro Library Guide for Software v10.1 | ![]() |
1 MB | 11/2012 |
IGLOOe FPGA Fabric User's Guide | ![]() |
21 MB | 9/2012 |
DC-DC Regulator Guide for Microsemi FPGAs and SOC FPGAs | ![]() |
379 KB | 3/2013 |
Application Notes
Application Briefs
AC242: Intelligent Mixed Signal FPGAs in Portable Medical Devices App Brief | ![]() |
568 KB | 8/2012 |
AC290: Trainable Image Recognition System Using Low Power Flash FPGAs App Brief | ![]() |
167 KB | 11/2006 |
AC293: System Power Optimization Controller Using IGLOO FPGAs App Brief | ![]() |
99 KB | 12/2006 |
AC357: FlashPro4 Backward Compatibility with FlashPro3 App Brief | ![]() |
448 KB | 10/2012 |
AC368: FPGA Solutions for Defibrillators App Brief | ![]() |
559 KB | 7/2011 |
AC369: FPGA Solutions for Ultrasound App Brief | ![]() |
433 KB | 7/2011 |
AC370: FPGA Solutions for 4D Imaging-based Therapy App Brief | ![]() |
483 KB | 7/2011 |
AC371: Personal Heart Monitor App Brief | ![]() |
486 KB | 7/2011 |
Low Power IDE Data Storage Solution | ![]() |
38 KB | 10/2006 |
Tutorials
TU0308: ARM Cortex-M1 Embedded Processor Tutorial |
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3.51 MB | 6/2017 |
Quality & Reliability Reports
Microsemi SoC Reliability Report - Rev. 11 | ![]() |
3 MB | 5/2013 |
White Papers
Product Information Brochures (PIB)
Microsemi Photovoltaic Solutions Brochure | ![]() |
2 MB | 6/2012 |
IGLOO Low-Power Flash FPGAs Brochure | ![]() |
1.28 MB | 3/2020 |
Other Information
Power FAQs | ![]() |
49 KB | 8/2006 |
Design Resources
Design Software |
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Request a License |
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Packaging | |
Design Hardware |
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Programming & Debug |
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IP Cores | |
Embedded Ecosystem |
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Partners |
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Power Analysis |
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IBIS Models |
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BSDL Models |
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IGLOO nano
Microsemi's IGLOO® nano low-power FPGAs offer groundbreaking possibilities in power, size and operating temperature. Available in logic densities from 100 LEs to 3K LEs, the 1.2 V to 1.5 V IGLOO nano devices have been designed for high-volume applications where power and size are key decision criteria.
Key Features
- Ultra-low power in Flash*Freeze mode, as low as 2 µW
- Variety of small footprint packages as small as 3x3 mm
- Best system performance of 250 MHZ
- Enhanced commercial temperature
- Reprogrammable flash technology
- 1.2 V to 1.5 V single voltage operation
- Enhanced I/O features
- Clock conditioning circuits (CCCs) and PLLs
- Embedded SRAM and nonvolatile memory (NVM)
- In-system programming (ISP) and security
Largest Selection of Small Footprint Packages
Microsemi's IGLOO nano low power FPGAs offer the largest selection of small footprint packages with the industry's smallest 3x3 mm micro chip scale package and six distinctive packages at 8x8 mm or less. Small size combined with the lowest-power FPGA available, starting at just 2 µW, opens new opportunities for designers of battery-powered handheld applications.
With the lowest power and smallest size in the industry, IGLOO nano devices are ideal for independent level shifting to enable support for varying voltage levels, I/O expansion or multiplexing, adapting to changing standards, and when embedded security is required to ensure fidelity of valuable intellectual property.
Product Family
Please refer to the ordering tab for a list of all available part numbers.
IGLOO nano Devices | AGLN010 | AGLN020 | AGLN060 | AGLN125 | AGLN250 | |
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System Gates | 10,000 | 20,000 | 60,000 | 125,000 | 250,000 | |
Equivalent LEs | 100 | 200 | 700 | 1.5 K | 3K | |
Flash*Freeze Mode (typical, µW) | 2 | 4 | 10 | 16 | 24 | |
RAM kbits (1,024 bits)1 |
18 | 36 | 36 | |||
4,608-Bit Blocks1 |
4 | 8 | 8 | |||
FlashROM Bits | 1,024 | 1,024 | 1,024 | 1,024 | 1,024 | |
Secure (AES) ISP1 |
Yes | Yes | Yes | |||
Integrated PLLs in CCCs1,2 | 1 | 1 | 1 | |||
I/O Standards | Std., Hot-Swap | Std., Hot-Swap | Std., Hot-Swap | Std., Hot-Swap | Std., Hot-Swap | |
I/O Banks | 2 | 3 | 2 | 2 | 4 | |
Maximum User I/Os | 34 | 52 | 71 | 71 | 68 | |
Speed Grades | Std. | Std. | Std. | Std. | Std. | |
Temperature Grades | C, I | C, I | C, I | C, I | C, I | |
Single-Ended I/Os | ||||||
UCG36 (3x3 mm) | 23 | |||||
QNG48 (6x6 mm) | 34 | |||||
QNG68 (8x8 mm) | 49 | |||||
CSG81 (5x5 mm) | 52 | 60 | 60 | 60 | ||
VQG100 (14x14 mm) | 71 | 71 | 68 |
Notes:
- AGLN030 nano devices and smaller do not support this feature.
- AGLN060, AGLN125, and AGLN250 in the CS81 package do not support PLLs
Documents
Datasheets
User's Guides & Manuals
Application Notes
Application Briefs
Quality & Reliability Reports
White Papers
Product Information Brochures (PIB)
Tutorials
DS0110: IGLOO nano Low Power Flash FPGAs Datasheet |
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13.49 MB | 05/2020 |
Pin Assignment Tables
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User's Guides and Manuals
IGLOO nano FPGA Fabric User's Guide | ![]() |
21 MB | 9/2012 |
DC-DC Regulator Guide for Microsemi FPGAs and SoC FPGAs | ![]() |
379 KB | 3/2013 |
Application Notes
Application Briefs
Quality & Reliability Reports
Microsemi SoC Reliability Report - Rev. 11 | ![]() |
3 MB | 5/2013 |
White Papers
Product Information Brochures (PIB)
IGLOO Low-Power Flash FPGAs Brochure | ![]() |
1.28 MB | 3/2020 |
Tutorials
Microsemi Libero IDE Quick Start Guide & Tutorial
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5 MB | 2/2012 |
Design Resources
Design Software |
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Request a License |
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Packaging | |
Design Hardware |
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Programming & Debug |
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IP Cores | |
Partners |
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Power Analysis |
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IBIS Models |
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BSDL Models |
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Low Power. Enhanced I/O capabilities
IGLOO PLUS
Microsemi's IGLOO® PLUS low-power FPGA family delivers unrivaled low-power and I/O features in a feature-rich programmable device, offering more I/Os per LEs than the IGLOO family and supporting independent Schmitt trigger inputs, hot-swapping, and Flash*Freeze bus hold.
Ranging from 330-1K LE, the 1.2 V to 1.5 V IGLOO PLUS devices have been optimized to meet the needs of I/O-intensive, power-conscious applications that require exceptional features.
Key Features
- I/O rich FPGA
- Low-power in Flash*Freeze mode, as low as 5 µW
- Low-power active capability
- Small footprint packages
- Reprogrammable flash technology
- 1.2 V to 1.5 V single voltage operation
- Clock conditioning circuits (CCCs) and PLLs
- Embedded SRAM and nonvolatile memory (NVM)
- In-system programming (ISP) and security
IGLOO PLUS low-power FPGAs offer the industry's best power-, area-, logic- and feature-per-I/O ratios in a programmable device. Best suited for bridging and I/O expansion applications.
Product Family
Please refer to the ordering tab for a list of all available part numbers.
IGLOO PLUS Devices | AGLP030 | AGLP060 | AGLP125 |
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System Gates | 30,000 | 60,000 | 125,000 |
Equivalent LEs | 330 | 700 | 1.5 K |
Quiescent Current (typical) in Flash*Freeze Mode ( µW) |
5 | 10 | 16 |
RAM kbits (1,024 bits | 18 | 36 | |
4,608-Bit Blocks | 4 | 8 | |
FlashROM Bits | 1,024 | 1,024 | 1,024 |
Secure (AES) ISP | Yes | Yes | |
Integrated PLLs in CCCs1 | 1 | 1 | |
I/O Standards | IGLOO PLUS | IGLOO PLUS | IGLOO PLUS |
I/O Banks (+JTAG | 4 | 4 | 4 |
Maximum User I/Os | 120 | 157 | 212 |
Speed Grades | Std. | Std. | Std. |
Temperature Grades | C, I | C, I | C, I |
Notes:
- AGLP060 in CS201 does not support the PLL.
Packing and I/Os
IGLOO PLUS Devices | AGLP030 | AGLP060 | AGLP125 |
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CSG201 (8x8 mm) | 120 | 157 | |
CSG281 (10x10 mm) | 212 | ||
CSG289 (14x14 mm) | 120 | 157 | 212 |
VQG128 (14x14 mm) | 101 | ||
VQG176 (20x20 mm) | 137 |
Documents
Datasheets
User's Guides & Manuals
Application Notes
Application Briefs
Quality & Reliability Reports
White Papers
Product Information Brochures (PIB)
OtherInformation
Datasheets
DS0102: IGLOO PLUS Low Power Flash FPGAs Datasheet | ![]() |
13 MB | 05/2020 |
Pin Assignment Tables
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User's Guides and Manuals
IGLOO PLUS FPGA Fabric User's Guide | ![]() |
19 MB | 9/2012 |
DC-DC Regulator Guide for Microsemi FPGAs and SoC FPGAs | ![]() |
379 KB | 3/2013 |
Application Notes
Application Briefs
Quality & Reliability Reports
Microsemi SoC Reliability Report - Rev. 11 | ![]() |
3 MB | 5/2013 |
White Papers
Product Information Brochures (PIB)
IGLOO Low-Power Flash FPGAs Brochure | ![]() |
1.28 MB | 3/2020 |
Other Information
Power FAQs | ![]() |
49 KB | 8/2006 |
Design Resources
Design Software |
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---|---|
Request a License |
|
Packaging | |
Design Hardware |
|
Programming & Debug |
|
IP Cores | |
Embedded Ecosystem |
|
Partners |
|
Power Analysis |
|
IBIS Models |
|
BSDL Models |
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Product Selector Guide
IGLOO\e:
The IGLOO family of reprogrammable and full-featured flash FPGAs is designed to meet the low-power and area requirements of today’s portable electronics. Based on nonvolatile flash technology, the 1.2 V to 1.5 V operating voltage family offers the industry’s lowest power consumption—as low as 5 μW. The IGLOO family supports up to 35K logic elements with up to 504 kbits of true dualport SRAM, up to six embedded PLLs, and up to 620 user I/Os. Low-power applications that require 32-bit processing can use the ARM Cortex-M1 processor without license fees or royalties in M1 IGLOO devices. Developed specifically for implementation in FPGAs, Cortex-M1 devices offer an optimal balance between performance and size to minimize power consumption.
IGLOO Nano:
IGLOO nano products offer groundbreaking possibilities in power, size, lead-times, operating temperature ranges, and cost. Available in logic densities from 100–3K logic elements, 1.2 V to 1.5 V IGLOO nano devices have been designed for high-volume applications where power and size are the key decision criteria. IGLOO nano devices are perfect ASIC or ASSP replacements, yet retain the historical FPGA advantages of flexibility and quick time-to-market in low-power and small footprint profiles.
IGLOO Plus:
IGLOO PLUS products deliver low power consumption and enhanced I/Os in a feature-rich programmable device, offering more I/Os per logic element than IGLOO devices, and supporting independent Schmitt trigger inputs, hot-swapping, and Flash*Freeze bus hold. Ranging from 330–1.5K logic elements, 1.2V to 1.5V IGLOO PLUS devices have been optimized to meet the needs of I/O intensive, power-conscious applications that require exceptional features.
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