Mi-V Embedded Ecosystem
Overview
Open. Lowest Power. Programmable RISC-V Solutions.
With the Mi-V™ ecosystem, Microsemi with industry leaders, aims to increase adoption of RISC-V ISA and Microsemi's soft CPU product family.
Mi-V RISC-V Ecosystem Brochure
Microsemi's Mi-V ecosystem contains a number of categories:
- Design Tools include Microsemi's SoftConsole Eclipse Based IDE, Firmware Catalog and Libero SoC.
- RISC-V Soft CPUs includes Microsemi's Mi-V RISC-V IP Cores
- Boards include RTG4 development Kit, IGLOO2 RISC-V Creative board from Future electronics, PolarFire evaluation Kit and multiple SmartFusion2 kits.
- Solutions include many Example projects, drivers and firmware available on GitHub.
- Operating Systems include FreeRTOS, Huawei LiteOS, Micrium µC OSIII and ThreadX.
EE World On Demand Webinar:
The RISC-V ecosystem is ready for prime time. Get started here!
Mi-V Partners
Mi-V Ecosystem Partners
For more information on RISC-V and the RISC-V Foundation, visit https://riscv.org/
Mi-V Ecosystem partners deliver many solutions for RISC-V.
| Antmicro |  |
| Imperas |  |
| Micrium, Inc. |  |
| SiFive |  |
| Technolution B.V. |  |
| VectorBlox |  |
News and Events
Newsletter: RISC-V E-Newsletter October 2017 - 10/20/2017
News: Express Logic’s X-Ware IoT Platform® Brings Industrial-Grade IoT Support to RISC-V Architecture - 02/15/2018
Newsletter: RISC-V E-Newsletter October 2017 - 10/20/2017
Express Logic, Inc. announces that its industrial-grade X-Ware IoT Platform®—powered by the industry-leading ThreadX® RTOS—provides turnkey support for Microsemi’s Mi-V RISC-V instruction set architectures (ISAs)
Article: Using RISC-V in FPGAs for strategic defense systems - 02/13/2018
Article: 11 Myths About the RISC-V ISA - 01/31/2018
News: Microsemi Launches Mi-V Ecosystem to Accelerate Adoption of RISC-V - 10/19/2017
Program Designed With Industry Leaders to Enable Open, Lowest Power, Programmable RISC-V Solutions
Article: Elektronik Praxis: SoftConsole 5.1: Windows Eclipse IDE with support for RISC-V command sets - 6/16/17
Microsemi introduces version 5.1 of its development environment SoftConsole. It is the world's first available Windows Eclipse IDE (Integrated Development Environment) for designs that use open RISC-V command set architectures (ISAs) such as RV32I.
IDE Supporting All 32-bit RISC-V Implementations to be Presented at 54th Design Automation Conference in Austin, Texas on June 20
In a move that broadens support for the RISC-V core, Microsemi has launched SoftConsole version 5.1, said to be the first Windows based Eclipse IDE for such designs.
Microsemi has used the Eclipse open-source IDE platform to develop a Windows-based toolchain for CPUs that supports the RISC-V instruction set.
Microsemi's SoftConsole version 5.1 introduces a Windows Eclipse Integrated Development Environment (IDE) for designs that use the open RISC-V command set architectures (ISAs) such as RV32I.
Microsemi has released its SoftConsole version 5.1. This is a Windows-hosted Eclipse integrated development environment, IDE for designs utilizing RISC-V open instruction set architectures, ISAs such as RV32I.
The release of the SoftConsole version 5.1 has been announced by Microsemi Corporation as the world’s first available Windows-hosted Eclipse integrated development environment (IDE) for designs utilising RISC-V open instruction set architectures (ISAs) such as RV32I
Company's IGLOO2, SmartFusion2 and RTG4 Devices are the Ideal FPGAs to Build RISC-V CPU Subsystems, Offering Lower Power and Proven Security
News: Microsemi's Ted Speers Joins Inaugural RISC-V Foundation Board of Directors to Support Company's IoT Growth Using New Emerging ISA Standard - 7/14/16
Leveraging Company's FPGA, Security and Data Center Expertise, Speers to Play Key Role in Directing Future Development and Driving Adoption of RISC-V
News: Microsemi Sponsors Design Training For Embedding RISC-V in its SmartFusion2 SoC FPGAs during Hands-on Tutorial Session - 7/6/16
