Design Tools

Libero SoC PolarFire Design Suite offers high productivity with its comprehensive, easy-to-learn, easy-to-adopt development tools for designing with Microsemi's PolarFire FPGA Family.

Libero SoC should be used for designing with Microsemi IGLOO2, SmartFusion2, SmartFusion, IGLOO, ProASIC3 and Fusion families. Libero Design Software integrates industry leading synthesis, debug and DSP support from Synopsys, and simulation from Mentor Graphics with power analysis, timing analysis and push button design flow.

Libero IDE should be used for designing with Microsemi antifuse and legacy flash FPGAs. Libero Design Software integrates industry leading synthesis, debug and DSP support from Synopsys, and simulation from Mentor Graphics with power analysis, timing analysis and push button design flow.

There are 5 types of licenses that can be used to design with Microsemi SoC devices, Libero Silver, Evaluation, Gold, Platinum, and Standalone licenses.

Leverage our Excel based power calculator to evaluate power for your design without running through the full design flow. SmartPower can also provide design specific power analysis for your design implementation within Libero.

Generic IBIS Models are available for signal integrity simulations. Design specific files can also be exported from your design implementation in Libero.

Generic BSDL Models are available for boundary scan testing. Design specific files can also be exported from your design implementation in Libero.

Other FPGA Development Components - These tools are installed with Libero

Synthesis software from Synopsys® included with Libero.

Synthesis tool from Mentor Graphic® for Microsemi FPGAs, providing a high performance logic synthesis environment with advanced optimization techniques, timing analysis and advanced inferencing technology

Synopsys' Microsemi Edition tool that performs high-level synthesis optimizations from a Simulink® specification. Synphony Model Compiler AE automatically produces a highly optimized design, ready for RTL synthesis

Modelsim ME from Mentor Graphics for Simulation

Processor and SoC Design

Facilitates software development for Microsemi's ARM® Cortex™–M3, Cortex-M1 and Core8051s microprocessors. SoftConsole is installed with Libero SoC.

An integrated development environment from IAR Systems for compiling and debugging embedded ARM applications, including Cortex-M3 for SmartFusion, using assembly, C and C++

An integrated development environment for ARM Cortex-M3 containing the ARM C/C++ compiler, µVision®4 IDE debugger, MicroLib highly optimized run-time library, Real-Time Trace for Cortex-M3 processor-based devices and RTX RTOS

Supports SoftConsole, Keil™ and IAR Systems® embedded software IDEs, streamlining the location and generation of firmware that is compatible with IP cores used in Microsemi FPGA designs.

Microsemi’s SoC FPGAs leverage a broad ecosystem of compile, debug, operating systems and middleware