ModelSim ME
Overview
Libero SoC v11.8 comes with a new simulator: ModelSim Pro ME which provides enhanced simulation capabilities. With this new edition of the simulator, Microsemi introduces mixed-language simulation for Verilog, SystemVerilog, and VHDL.
Libero SoC PolarFire and Libero SoC v11.8 or later now include ModelSim Pro. The Libero Silver license supports only ModelSim ME, while Gold and Platinum licenses support ModelSim Pro. Customers have to select ModelSim Pro in Tool Profiles to access this release.
Mentor Graphics ModelSim Simulator is a source-level verification tool, allowing you to verify HDL code line by line. You can perform simulation at all levels: behavioral (pre-synthesis), structural (post-synthesis), and back-annotated, dynamic simulation.
Coupled with the most popular HDL debugging capabilities in the industry, ModelSim is known for delivering high performance, ease of use, and outstanding product support.
An easy-to-use graphical user interface enables you to quickly identify and debug problems, aided by dynamically updated windows. For example, selecting a design region in the Structure window automatically updates the Source, Signals, Process, and Variables windows. These cross linked ModelSim windows create an easy-to-use debug environment. Once a problem is found, you can edit, recompile, and re-simulate without leaving the simulator. ModelSim fully supports current VHDL and Verilog language standards. You can simulate behavioral, RTL, and gate level code separately or simultaneously. ModelSim supports all Microsemi FPGA libraries, ensuring accurate timing simulations.
The comprehensive user interface makes efficient use of desktop real estate. The intuitive arrangement of interactive graphical elements (windows, toolbars, menus, etc.) makes it easy to view and access the many powerful capabilities of ModelSim. The result is a feature-rich user interface that is easy to use and quickly mastered.
ModelSim ME User Interface
Documents
FAQ
| Libero IDE License Troubleshooting Guide | 3/2017 |
| ModelSim Simulation FAQ | 3/2017 |
Other
Downloads
Libero SoC PolarFire and Libero SoC v11.8 or later now include ModelSim Pro for mixed-language simulation. Libero Silver license supports only ModelSim ME, while Gold and Platinum licenses support ModelSim Pro. Customers have to select ModelSim Pro in Tool Profiles to access this release.
ModelSim ME and ModelSim Pro for Simulation are installed with Libero SoC by default, they are not available as a standalone installation.
ModelSim ME for Simulation is installed with Libero IDE by default, is not available as a standalone installation.
Important Note:
- There are no VHDL models for SmartFusion2 or IGLOO2 families.
- There is no Verilog source for MSS and SerDes simulation models for SmartFusion, SmartFusion2 and IGLOO2 families. MSS and SerDes simulation models are included in the pre-compiled ModelSim ME library installed with the Libero SoC software.
- The libraries below include models for the library cells and blocks in the FPGA fabric.
ModelSim ME v10.5c Standalone Software Release (08/03/2017)
Important Note:Libero IDE v9.2 SP3 users working on Windows 10 platform must install ModelSim ME v10.5c standalone software to simulate the design.
Simulation Libraries
- Vlog/VITAL for v11.5 (Windows) (2.4 MB)
- Vlog/VITAL for v11.5 (Linux) (2.4 MB)
- VHDL/VITAL for v11.3 (Windows) (1.6 MB)
- VHDL/VITAL for v11.3 (Linux) (1.6 MB)
- VHDL/VITAL for v11.2 (Windows) (1.6 MB)
- VHDL/VITAL for v11.2 (Linux) (1.6 MB)
- VHDL/VITAL for v11.0 (Windows) (1.4 MB)
- VHDL/VITAL for v11.0 (Linux) (1.4 MB)
- VHDL/VITAL for v9.0 (Windows) (2.8 MB)
- VHDL/VITAL for v8.6 (Linux) (2.6 MB)
- Verilog for v11.3 (Windows) (910 KB)
- Verilog for v11.3 (Linux) (896 KB)
- Verilog for v11.2 (Windows) (910 KB)
- Verilog for v11.2 (Linux) (896 KB)
- Verilog for v11.0 (Windows) (907 KB)
- Verilog for v11.0 (Linux) (892 KB)
- Verilog for v9.0 (Windows) (1.3 MB)
- Verilog for v8.6 (Linux) (1 MB)
Compiled Verilog simulation libraries for other tools are available for download. If you require a version that is not listed, please contact Microsemi technical support team by filing a case at https://soc.microsemi.com/Portal/Default.aspx
