CoreQSPI |
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Overview
This CoreQSPI provides AHB system Interface and SPI interface to connect with the SPI memory devices. The control registers is used to configure the IP in different modes and the FIFO is used to buffer the data across clock domains
Supported Devices:
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Alphanumeric Parameter | Value |
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Functional Category | Bus Interfaces,Communications |
Core Provider | Microchip |
Device Family | PolaFireSoC,PolarFire,RTG4,IGLOO2,SmartFusion2 |
License | |
Application | 1588 Timing Card,Aerospace,Automotive,Carrier,Computer,Connected Home,Consumer,Data Communications,Gaming,Industrial,IP Camera,IP Phone,Line Card,Medical,Microprocessor,Military,Multimedia,Portable,Signal Processing,SMB,Storage,SyncE Timing Card,Telecom,USB Audio,Wireless,WiMax |
This part can be found in the following product categories: