MIV_RV32IMAF_L1_AHB |
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Overview
The MIV_RV32IMAF_L1_AHB is a softcore processor designed to implement the RISC-V instruction set for use in Microsemi FPGAs. The processor is based on Rocket-Chip, which contains a highperformance single-issue in order execution pipeline 32-bit RISC-V core. This core includes, an industrystandard JTAG interface to facilitate debug access, along with separate AHB bus interfaces for memory and IO access, Error-Correcting Code (ECC) cache memory availability and support for 31 dedicated interrupt ports.
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Alphanumeric Parameter | Value |
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Functional Category | Processors & Peripherals |
Device Family | PolaFireSoC,PolarFire,IGLOO2,SmartFusion2 |
License | |
Core Provider | Microchip |
Application | Aerospace,Automotive,Industrial,Medical,WiMax |
This part can be found in the following product categories: