MiV_RV32IMA_L1_AHB |
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Overview
The MiV_RV32IMA_L1_AHB is a softcore processor designed to implement the RISC-V instruction set for use in Microsemi FPGAs. The processor is based on the Coreplex E31 designed by SiFive, containing a high-performance single-issue, in-order execution pipeline E31 32-bit RISC-V core. The core includes an industry-standard JTAG interface to facilitate debug access, along with the separate AHB bus interfaces for memory access and support for 31 dedicated interrupt ports. Key Features:
Supported Devices:
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Alphanumeric Parameter | Value |
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Functional Category | Processors & Peripherals |
Device Family | PolarFire,RTG4,IGLOO2,SmartFusion2 |
License | |
Core Provider | Microchip |
Application | 1588 Timing Card,Aerospace,Automotive,Carrier,Computer,Connected Home,Consumer,Data Communications,Gaming,Industrial,IP Camera,IP Phone,Line Card,Medical,Microprocessor,Military,Multimedia,Portable,Signal Processing,SMB,Storage,SyncE Timing Card,Telecom,USB Audio,Wireless,WiMax |
This part can be found in the following product categories: