CoreApbNvm |
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Overview
CoreApbNvm allows advanced microcontroller bus architecture (AMBA) Peripheral Bus (APB) access to the Microsemi Fusion nonvolatile memory (NVM), using a simple register-based access scheme. The core is designed to be configurable for use in various applications, using variable APB bus widths and a number of NVM instances (where supported). In addition, CoreApbNvm contains an Init/Config block which is used on reset to initialize RAM with the contents of NVM0. After reset, the Init/Config block can also be used to copy a user-specified number of words from NVM, starting at a user-specified base address. Features:
Supported Devices:
Market Segments:
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Alphanumeric Parameter | Value |
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Core Provider | Microchip |
Functional Category | Bus Interfaces,Memory Controllers,Processors & Peripherals,Storage |
Device Family | Fusion |
Application | 1588 Timing Card,Aerospace,Automotive,Carrier,Computer,Connected Home,Consumer,Data Communications,Gaming,Industrial,IP Camera,IP Phone,Line Card,Medical,Microprocessor,Military,Multimedia,Portable,Signal Processing,SMB,Storage,SyncE Timing Card,Telecom,USB Audio,Wireless,WiMax |
This part can be found in the following product categories: