CoreAHBLSRAM |
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Overview
The CoreAHBLSRAM provides access to the embedded large SRAM (LSRAM)and small SRAM (uSRAM) blocks present on SmartFusion2 SOC FPGA family devices through AHB-Lite slave interface. It facilitates convenient access to SRAM by AHB masters. Read and write transactions on the AHB are converted into corresponding transfers on the LSRAM or uSRAM. Key Features:
Supported Devices:
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Alphanumeric Parameter | Value |
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Core Provider | Microchip |
Functional Category | Memory Controllers |
Device Family | RTG4,IGLOO2,SmartFusion2 |
Application | 1588 Timing Card,Aerospace,Automotive,Carrier,Computer,Connected Home,Consumer,Data Communications,Gaming,Industrial,IP Camera,IP Phone,Line Card,Medical,Microprocessor,Military,Multimedia,Portable,Signal Processing,SMB,Storage,SyncE Timing Card,Telecom,USB Audio,Wireless,WiMax |
This part can be found in the following product categories: