#Build: Synplify Pro 8.5F, Build 001R, Mar 7 2006 #install: D:\Libero72\Synplify\Synplify_85F #OS: Windows XP 5.1 #Hostname: WXP-WONGAL #Thu Feb 08 18:15:09 2007 $ Running Identify Instrumentor. See log file: @N: : identify.log | #Thu Feb 08 18:15:09 2007 $ Start of Compile #Thu Feb 08 18:15:16 2007 Synplicity VHDL Compiler, version 3.4.1, Build 137R, built Apr 7 2006 Copyright (C) 1994-2005, Synplicity Inc. All Rights Reserved @N: : config_top.vhd(23) | Top entity is set to config_top. VHDL syntax check successful! File D:\ProgrammingSRAM\sconfig\synthesis\rev_1_identify_1\instr_sources\.filemap changed - recompiling @N:CD630 : config_top.vhd(17) | Synthesizing work.config_top.rtl @N:CD630 : syn_dics.vhd(5198) | Synthesizing work.iice_0.structure @N:CD630 : syn_dics.vhd(4677) | Synthesizing work.b7_ofwnt9s.b3_vfw @N:CD630 : syn_dics.vhd(1043) | Synthesizing work.b12_ofwnt9_wmeed.b3_joc Post processing for work.b12_ofwnt9_wmeed.b3_joc @N:CD630 : syn_dics.vhd(4610) | Synthesizing work.ram_block.struct @N:CD630 : syn_dics.vhd(1253) | Synthesizing work.ramsliceram_block.struct @N:CD630 : syn_dics.vhd(1101) | Synthesizing work.genericramram_block.struct @N:CD630 : fusion.vhd(3267) | Synthesizing work.ram512x18.syn_black_box Post processing for work.ram512x18.syn_black_box Post processing for work.genericramram_block.struct Post processing for work.ramsliceram_block.struct Post processing for work.ram_block.struct Post processing for work.b7_ofwnt9s.b3_vfw @N:CD630 : syn_dics.vhd(4933) | Synthesizing work.b3_ukr.b3_vcj @N:CD630 : syn_dics.vhd(4837) | Synthesizing work.b7_plf_6ln.b3_vcj Post processing for work.b7_plf_6ln.b3_vcj @N:CD630 : syn_dics.vhd(4882) | Synthesizing work.b12_nvmfl_la1xyh.b3_vcj Post processing for work.b12_nvmfl_la1xyh.b3_vcj Post processing for work.b3_ukr.b3_vcj @N:CD630 : syn_dics.vhd(5033) | Synthesizing work.b3_12m.b6_oczobx @W:CD638 : syn_dics.vhd(5097) | Signal b11_nutz3qm_tkl is undriven @N:CD630 : syn_dics.vhd(636) | Synthesizing work.b7_pffzrny.b6_oczobx @N:CD630 : syn_dics.vhd(492) | Synthesizing work.b5_nvmfl.b6_oczobx Post processing for work.b5_nvmfl.b6_oczobx @N:CD630 : syn_dics.vhd(588) | Synthesizing work.b11_psyil9s1fkt.b3_joc @N:CD630 : syn_dics.vhd(538) | Synthesizing work.b15_crgctcua_eh4_wi.b3_joc @N:CD630 : syn_dics.vhd(526) | Synthesizing work.b9_o2yyf_fg2.b3_joc Post processing for work.b9_o2yyf_fg2.b3_joc Post processing for work.b15_crgctcua_eh4_wi.b3_joc @N:CD630 : syn_dics.vhd(412) | Synthesizing work.b8_1lbcqdr1.b3_joc Post processing for work.b8_1lbcqdr1.b3_joc Post processing for work.b11_psyil9s1fkt.b3_joc Post processing for work.b7_pffzrny.b6_oczobx @W:CL209 : syn_dics.vhd(638) | Input port bit <5> of b9_slyy_nrgd(0 to 52) is unused @N:CD630 : syn_dics.vhd(826) | Synthesizing work.b7_ocbylxc.b3_joc @W:CD274 : syn_dics.vhd(942) | Incomplete case statement - add more cases or a when others @N:CD630 : syn_dics.vhd(737) | Synthesizing work.b8_nr_ymqrg.b3_joc Post processing for work.b8_nr_ymqrg.b3_joc Post processing for work.b7_ocbylxc.b3_joc @N:CL201 : syn_dics.vhd(924) | Trying to extract state machine for register b13_nAzGfFM_sLsv3 Extracted state machine for register b13_nAzGfFM_sLsv3 State machine has 6 reachable states with original encodings of: 0000 0001 0010 0011 0100 1101 Post processing for work.b3_12m.b6_oczobx Post processing for work.iice_0.structure @N:CD630 : syn_dics.vhd(5140) | Synthesizing work.ldic1_0.structure Post processing for work.ldic1_0.structure @N:CD630 : syn_dics.vhd(243) | Synthesizing work.comm_block.b3_joc @N:CD630 : syn_dics.vhd(5) | Synthesizing work.b9_orbiwxaef.b3_vcj Post processing for work.b9_orbiwxaef.b3_vcj @N:CD630 : syn_dics.vhd(192) | Synthesizing work.b16_rcmi_qlx9_yhpm7y.b3_vcj Post processing for work.b16_rcmi_qlx9_yhpm7y.b3_vcj @N:CD630 : syn_dics.vhd(70) | Synthesizing work.jtag_interface.b3_vcj @W:CD434 : syn_dics.vhd(159) | Signal identify_clk2_no_clk_buffer_needed in the sensitivity list is not used in the process @W:CD434 : syn_dics.vhd(170) | Signal identify_clk2_no_clk_buffer_needed in the sensitivity list is not used in the process @W:CD638 : syn_dics.vhd(94) | Signal b14_gir9p_al2ezh2v is undriven @N:CD630 : fusion.vhd(4363) | Synthesizing work.ujtag.syn_black_box Post processing for work.ujtag.syn_black_box Post processing for work.jtag_interface.b3_vcj Post processing for work.comm_block.b3_joc @N:CD630 : cfgnvm.vhd(7) | Synthesizing work.cfgnvm.def_arch @N:CD630 : fusion.vhd(4474) | Synthesizing work.nvm.syn_black_box Post processing for work.nvm.syn_black_box @N:CD630 : fusion.vhd(3021) | Synthesizing work.vcc.syn_black_box Post processing for work.vcc.syn_black_box @N:CD630 : fusion.vhd(1901) | Synthesizing work.gnd.syn_black_box Post processing for work.gnd.syn_black_box Post processing for work.cfgnvm.def_arch @W:CL168 : cfgnvm.vhd(119) | Pruning instance VCC_power_inst1 - not in use ... @N:CD630 : sconfig.vhd(18) | Synthesizing work.sconfig.rtl @N:CD630 : syn_dics.vhd(5165) | Synthesizing work.ldic4_0.structure Post processing for work.ldic4_0.structure @N:CD630 : ram256x8.vhd(7) | Synthesizing work.ram256x8.def_arch @N:CD630 : fusion.vhd(3184) | Synthesizing work.ram4k9.syn_black_box Post processing for work.ram4k9.syn_black_box @N:CD630 : fusion.vhd(2119) | Synthesizing work.inv.syn_black_box Post processing for work.inv.syn_black_box Post processing for work.ram256x8.def_arch Post processing for work.sconfig.rtl @W:CL170 : sconfig.vhd(361) | Pruning bit <7> of wdata(7 downto 0) - not in use ... @N:CL201 : sconfig.vhd(541) | Trying to extract state machine for register state2 Extracted state machine for register state2 State machine has 10 reachable states with original encodings of: 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 @N:CL201 : sconfig.vhd(233) | Trying to extract state machine for register state Extracted state machine for register state State machine has 8 reachable states with original encodings of: 000 001 010 011 100 101 110 111 @N:CD630 : pll_60_40_10.vhd(7) | Synthesizing work.pll_60_40_10.def_arch @N:CD630 : fusion.vhd(4213) | Synthesizing work.pll.syn_black_box Post processing for work.pll.syn_black_box Post processing for work.pll_60_40_10.def_arch @N:CD630 : rc_osc.vhd(7) | Synthesizing work.rc_osc.def_arch @N:CD630 : fusion.vhd(4457) | Synthesizing work.rcosc.syn_black_box Post processing for work.rcosc.syn_black_box Post processing for work.rc_osc.def_arch Post processing for work.config_top.rtl @END Process took 0h:00m:12s realtime, 0h:00m:12s cputime # Thu Feb 08 18:15:29 2007 ###########################################################[ Synplicity Proasic Technology Mapper, Version 8.6.0, Build 155R, Built Apr 11 2006 Copyright (C) 1994-2006, Synplicity Inc. All Rights Reserved Version 8.5F @N:MF249 : | Running in 32-bit mode. @N: : | Gated clock conversion disabled @W:BN153 : | View "prim", Cell "NGMUX", Port "CLK0": remove clock marking @W:BN153 : | View "prim", Cell "NGMUX", Port "CLK1": remove clock marking @W:BN154 : | View "prim" of Cell "NGMUX": 4 sequential timing arcs are removed Automatic dissolve at startup in view:work.sconfig(rtl) of ldic4_inst_0(ldic4_0) Automatic dissolve at startup in view:work.sconfig(rtl) of M1(ram256x8) Automatic dissolve at startup in view:work.comm_block(b3_joc) of b9_ORb_xNywD(b9_ORbIwXaEF) Automatic dissolve at startup in view:work.comm_block(b3_joc) of b7_Rcmi_ql(b16_Rcmi_qlx9_yHpm7y) Automatic dissolve at startup in view:work.b7_OCByLXC(b3_joc) of b11_nUTGT_khWqH(b8_nR_ymqrG) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_G.0.b19_O2yyf_fG2_MiQA1E6_h(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_E.0.b25_O2yyf_fG2_MiQA1E6_r_lnxob(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_E.3.b25_O2yyf_fG2_MiQA1E6_r_lnxob(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_E.2.b25_O2yyf_fG2_MiQA1E6_r_lnxob(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_E.1.b25_O2yyf_fG2_MiQA1E6_r_lnxob(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.9.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.2.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.11.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.0.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.5.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.6.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.7.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.4.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.1.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.10.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.3.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.8.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.12.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b7_PfFzrNY(b6_oczobx) of b5_PbrtL(b5_nvmFL) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst255(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst254(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst253(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst252(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst251(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst250(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst249(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst248(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst247(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst246(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst245(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst244(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst243(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst242(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst241(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst240(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst239(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst238(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst237(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst236(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst235(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst234(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst233(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst232(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst231(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst230(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst229(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst228(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst227(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst226(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst225(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst224(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst223(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst222(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst221(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst220(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst219(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst218(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst217(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst216(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst215(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst214(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst213(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst212(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst211(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst210(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst209(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst208(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst207(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst206(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst205(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst204(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst203(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst202(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst201(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst200(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst199(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst198(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst197(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst196(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst195(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst194(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst193(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst192(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst191(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst190(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst189(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst188(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst187(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst186(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst185(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst184(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst183(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst182(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst181(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst180(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst179(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst178(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst177(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst176(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst175(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst174(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst173(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst172(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst171(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst170(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst169(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst168(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst167(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst166(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst165(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst164(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst163(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst162(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst161(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst160(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst159(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst158(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst157(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst156(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst155(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst154(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst153(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst152(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst151(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst150(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst149(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst148(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst147(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst146(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst145(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst144(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst143(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst142(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst141(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst140(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst139(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst138(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst137(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst136(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst135(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst134(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst133(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst132(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst131(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst130(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst129(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst128(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst127(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst126(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst125(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst124(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst123(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst122(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst121(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst120(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst119(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst118(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst117(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst116(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst115(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst114(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst113(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst112(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst111(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst110(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst109(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst108(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst107(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst106(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst105(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst104(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst103(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst102(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst101(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst100(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst99(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst98(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst97(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst96(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst95(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst94(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst93(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst92(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst91(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst90(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst89(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst88(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst87(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst86(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst85(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst84(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst83(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst82(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst81(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst80(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst79(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst78(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst77(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst76(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst75(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst74(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst73(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst72(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst71(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst70(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst69(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst68(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst67(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst66(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst65(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst64(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst63(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst62(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst61(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst60(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst59(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst58(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst57(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst56(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst55(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst54(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst53(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst52(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst51(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst50(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst49(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst48(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst47(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst46(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst45(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst44(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst43(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst42(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst41(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst40(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst39(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst38(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst37(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst36(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst35(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst34(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst33(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst32(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst31(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst30(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst29(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst28(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst27(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst26(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst25(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst24(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst23(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst22(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst21(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst20(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst19(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst18(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst17(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst16(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst15(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst14(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst13(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst12(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst11(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst10(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst9(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst8(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst7(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst6(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst5(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst4(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst3(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst2(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst1(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst0(GenericRAMram_block) Automatic dissolve at startup in view:work.config_top(rtl) of ldic1_inst_0(ldic1_0) Automatic dissolve at startup in view:work.config_top(rtl) of M2(cfgnvm) Automatic dissolve at startup in view:work.config_top(rtl) of M1(cfgnvm) Automatic dissolve at startup in view:work.config_top(rtl) of C2(PLL_60_40_10) Automatic dissolve at startup in view:work.config_top(rtl) of C1(rc_osc) RTL optimization done. Finished RTL optimizations (Time elapsed 0h:00m:12s; Memory used current: 42MB peak: 52MB) Encoding state machine work.sconfig(rtl)-state[0:7] original code -> new code 000 -> 00000001 001 -> 00000010 010 -> 00000100 011 -> 00001000 100 -> 00010000 101 -> 00100000 110 -> 01000000 111 -> 10000000 Encoding state machine work.sconfig(rtl)-state2[0:9] original code -> new code 0000 -> 0000000001 0001 -> 0000000010 0010 -> 0000000100 0011 -> 0000001000 0100 -> 0000010000 0101 -> 0000100000 0110 -> 0001000000 0111 -> 0010000000 1000 -> 0100000000 1001 -> 1000000000 @N:MF176 : | Default generator successful @N:MF238 : sconfig.vhd(288) | Found 19 bit incrementor, 'un1_inc[18:0]' @N:MF176 : | Default generator successful Encoding state machine work.b7_OCByLXC(b3_joc)-b13_nAzGfFM_sLsv3[0:5] original code -> new code 0000 -> 000001 0001 -> 000010 0010 -> 000100 0011 -> 001000 0100 -> 010000 1101 -> 100000 @W:MO129 : syn_dics.vhd(898) | Sequential instance iice_inst_0.b7_12mFLWM.b5_nUTGT.b3_nfs[1] has been reduced to a combinational gate by constant propagation Finished factoring (Time elapsed 0h:00m:18s; Memory used current: 45MB peak: 52MB) Finished gated-clock and generated-clock conversion (Time elapsed 0h:00m:25s; Memory used current: 54MB peak: 56MB) Finished generic timing optimizations - Pass 1 (Time elapsed 0h:00m:36s; Memory used current: 74MB peak: 76MB) Starting Early Timing Optimization (Time elapsed 0h:00m:41s; Memory used current: 78MB peak: 78MB) Finished Early Timing Optimization (Time elapsed 0h:00m:48s; Memory used current: 78MB peak: 78MB) Finished generic timing optimizations - Pass 2 (Time elapsed 0h:00m:50s; Memory used current: 74MB peak: 78MB) Finished preparing to map (Time elapsed 0h:01m:00s; Memory used current: 71MB peak: 78MB) Promoting Net b3_PK3 on CLKINT jtag_block.jtagi.b3_PK3_inferred_clock Promoting Net CLK_c on CLKBUF CLK_pad Promoting Net RST_c on CLKBUF RST_pad Promoting Net comm2iice_link_iice_0_a_0[7] on CLKINT I_70 Replicating nvm_addr_i_0[18], fanout 14 segments 2 Replicating U1.N_1232, fanout 20 segments 2 Replicating U1.addr_ld_0_sqmuxa, fanout 19 segments 2 Replicating U1.N_1121, fanout 20 segments 2 Replicating U1.G1.0.P4.un12_state, fanout 19 segments 2 Buffering DI_c, fanout 26 segments 3 Buffering CSn_c, fanout 27 segments 3 Replicating U1.N_1347, fanout 24 segments 2 Replicating U1.state[7], fanout 14 segments 2 Replicating U1.state[4], fanout 16 segments 2 Replicating U1.state2[1], fanout 25 segments 3 Replicating U1.state2[9], fanout 23 segments 2 Replicating uplink_8_a[6], fanout 13 segments 2 Replicating uplink_8_a[7], fanout 15 segments 2 Replicating uplink_8_a[8], fanout 21 segments 2 Replicating U1.P2.un6_bit_cnt, fanout 13 segments 2 Buffering CSn_c, fanout 14 segments 2 Replicating U1.state[5], fanout 13 segments 2 Replicating U1.state2[8], fanout 15 segments 2 Finished technology mapping (Time elapsed 0h:01m:54s; Memory used current: 67MB peak: 79MB) Finished technology timing optimizations and critical path resynthesis (Time elapsed 0h:01m:58s; Memory used current: 67MB peak: 79MB) Added 5 Buffers Added 17 Cells via replication Added 5 Buffers Added 17 Cells via replication Added 5 Buffers Added 17 Cells via replication Added 5 Buffers Added 17 Cells via replication Finished restoring hierarchy (Time elapsed 0h:02m:02s; Memory used current: 86MB peak: 86MB) @W:BN153 : | View "prim", Cell "NGMUX", Port "CLK0": remove clock marking @W:BN153 : | View "prim", Cell "NGMUX", Port "CLK1": remove clock marking @W:BN154 : | View "prim" of Cell "NGMUX": 4 sequential timing arcs are removed @N:BN191 : | Writing property annotation file D:\ProgrammingSRAM\sconfig\synthesis\rev_1_identify_1\config_top.tap. Writing Analyst data base D:\ProgrammingSRAM\sconfig\synthesis\rev_1_identify_1\config_top.srm @N:BN225 : | Writing default property annotation file D:\ProgrammingSRAM\sconfig\synthesis\rev_1_identify_1\config_top.map. Writing EDIF Netlist and constraint files Found clock config_top|CSn with period 1000.00ns Found clock config_top|CLK with period 1000.00ns Found clock jtag_interface|b3_PK3_inferred_clock with period 1000.00ns Found clock jtag_interface|b7_oSD_3vW_inferred_clock with period 1000.00ns Found clock jtag_interface|identify_clk2_no_clk_buffer_needed with period 1000.00ns @W: : pll_60_40_10.vhd(47) | Net mdic_link[5] appears to be a clock source which was not identified. Assuming default frequency. ##### START OF TIMING REPORT #####[ # Timing Report written on Thu Feb 08 18:18:30 2007 # Top view: config_top Library name: fusion Operating conditions: COMWC-2 ( T = 70.0, V = 1.58, P = 1.15, tree_type = balanced_tree ) Requested Frequency: 1.0 MHz Wire load mode: top Wire load model: fusion Paths requested: 5 Constraint File(s): @N:MT195 : | This timing report estimates place and route data. Please look at the place and route timing report for final timing.. @N:MT197 : | Clock constraints cover only FF-to-FF paths associated with the clock.. Performance Summary ******************* Worst slack in design: 482.156 Requested Estimated Requested Estimated Clock Clock Starting Clock Frequency Frequency Period Period Slack Type Group ---------------------------------------------------------------------------------------------------------------------------------------------------------- config_top|CLK 1.0 MHz 28.0 MHz 1000.000 35.687 482.156 inferred Inferred_clkgroup_0 jtag_interface|b3_PK3_inferred_clock 1.0 MHz 21.3 MHz 1000.000 46.865 953.135 inferred Inferred_clkgroup_5 jtag_interface|b7_oSD_3vW_inferred_clock 1.0 MHz 73.1 MHz 1000.000 13.678 986.322 inferred Inferred_clkgroup_3 jtag_interface|identify_clk2_no_clk_buffer_needed 1.0 MHz 36.7 MHz 1000.000 27.229 972.771 inferred Inferred_clkgroup_4 System 1.0 MHz 30.5 MHz 1000.000 32.823 967.177 system default_clkgroup ========================================================================================================================================================== Clock Relationships ******************* Clocks | rise to rise | fall to fall | rise to fall | fall to rise -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Starting Ending | constraint slack | constraint slack | constraint slack | constraint slack -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- config_top|CLK config_top|CLK | 1000.000 979.541 | 1000.000 981.223 | 500.000 482.156 | No paths - config_top|CLK config_top|CSn | Diff grp - | No paths - | No paths - | No paths - jtag_interface|b7_oSD_3vW_inferred_clock jtag_interface|b7_oSD_3vW_inferred_clock | 1000.000 986.322 | No paths - | No paths - | No paths - jtag_interface|b7_oSD_3vW_inferred_clock jtag_interface|identify_clk2_no_clk_buffer_needed | Diff grp - | No paths - | No paths - | No paths - jtag_interface|identify_clk2_no_clk_buffer_needed jtag_interface|identify_clk2_no_clk_buffer_needed | 1000.000 972.771 | No paths - | No paths - | No paths - jtag_interface|identify_clk2_no_clk_buffer_needed jtag_interface|b3_PK3_inferred_clock | Diff grp - | No paths - | No paths - | No paths - jtag_interface|b3_PK3_inferred_clock jtag_interface|identify_clk2_no_clk_buffer_needed | Diff grp - | No paths - | No paths - | No paths - jtag_interface|b3_PK3_inferred_clock jtag_interface|b3_PK3_inferred_clock | 1000.000 953.135 | No paths - | No paths - | No paths - ================================================================================================================================================================================================== Note: 'No paths' indicates there are no paths in the design for that pair of clock edges. 'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups. Interface Information ********************* No IO constraint found ==================================== Detailed Report for Clock: config_top|CLK ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------- U1.cmnd[3] config_top|CLK DFN1E1C1 Q uplink_8_a[13] 0.364 482.156 U1.cmnd[4] config_top|CLK DFN1E1C1 Q uplink_8_a[12] 0.364 482.411 U1.cmnd[5] config_top|CLK DFN1E1C1 Q uplink_8_a[11] 0.364 483.459 U1.cmnd[2] config_top|CLK DFN1E1C1 Q uplink_8_a[14] 0.364 483.863 U1.bit_cnt_0[0] config_top|CLK DFN1C1 Q uplink_8_a_0[8] 0.292 484.073 U1.cmnd[6] config_top|CLK DFN1E1C1 Q uplink_8_a[10] 0.364 484.106 U1.bit_cnt_0[1] config_top|CLK DFN1C1 Q uplink_8_a_0[7] 0.292 484.957 U1.bit_cnt_0[2] config_top|CLK DFN1C1 Q uplink_8_a_0[6] 0.292 485.414 U1.cmnd[0] config_top|CLK DFN1E1C1 Q uplink_8_a[16] 0.292 485.517 U1.cmnd[1] config_top|CLK DFN1E1C1 Q uplink_8_a[15] 0.292 485.563 =================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------- U1.rdata[1] config_top|CLK DFN0C1 D rdata_4_i[1] 499.590 482.156 U1.rdata[4] config_top|CLK DFN0C1 D rdata_4_i[4] 499.590 482.156 U1.rdata[2] config_top|CLK DFN0C1 D rdata_4[2] 499.590 482.512 U1.rdata[3] config_top|CLK DFN0C1 D rdata_4[3] 499.590 482.512 U1.rdata[5] config_top|CLK DFN0C1 D rdata_4[5] 499.590 482.512 U1.rdata[6] config_top|CLK DFN0C1 D rdata_4[6] 499.590 482.512 U1.rdata[7] config_top|CLK DFN0C1 D rdata_4[7] 499.590 482.512 U1.rdata[0] config_top|CLK DFN0C1 D rdata_4[0] 499.590 484.282 U1.start[7] config_top|CLK DFN1C0 D start_3[7] 999.690 979.541 U1.start[6] config_top|CLK DFN1C0 D start_3[6] 999.690 980.464 =========================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 500.000 - Setup time: 0.410 = Required time: 499.590 - Propagation time: 17.434 = Slack (critical) : 482.156 Number of logic level(s): 6 Starting point: U1.cmnd[3] / Q Ending point: U1.rdata[1] / D The start point is clocked by config_top|CLK [rising] on pin CLK The end point is clocked by config_top|CLK [falling] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ------------------------------------------------------------------------------------------ U1.cmnd[3] DFN1E1C1 Q Out 0.364 0.364 - uplink_8_a[13] Net - - 3.650 - 9 U1.un2_iena_0_o2_2 NOR2 A In - 4.014 - U1.un2_iena_0_o2_2 NOR2 Y Out 0.287 4.301 - N_1217 Net - - 1.060 - 2 U1.un2_iena_0_o2_0 OR2A A In - 5.361 - U1.un2_iena_0_o2_0 OR2A Y Out 0.305 5.666 - N_1218 Net - - 2.660 - 6 U1.nxt3_0_a2_0 NOR3A B In - 8.326 - U1.nxt3_0_a2_0 NOR3A Y Out 0.276 8.602 - N_1433 Net - - 1.060 - 2 U1.nxt3_0_a2 NOR2B B In - 9.662 - U1.nxt3_0_a2 NOR2B Y Out 0.351 10.013 - nvm_read Net - - 2.990 - 7 U1.P5.rdata_4_i_a2_2[1] OR2A A In - 13.003 - U1.P5.rdata_4_i_a2_2[1] OR2A Y Out 0.305 13.308 - N_1442 Net - - 2.990 - 7 U1.P5.rdata_4_i[1] OA1B A In - 16.298 - U1.P5.rdata_4_i[1] OA1B Y Out 0.506 16.804 - rdata_4_i[1] Net - - 0.630 - 1 U1.rdata[1] DFN0C1 D In - 17.434 - ========================================================================================== Total path delay (propagation time + setup) of 17.844 is 2.804(15.7%) logic and 15.040(84.3%) route. ==================================== Detailed Report for Clock: jtag_interface|b3_PK3_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------ iice_inst_0.b3_SoW.b9_v_mzCDYXs[11] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[11] 0.364 967.884 iice_inst_0.b3_SoW.b9_v_mzCDYXs[12] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[12] 0.364 967.942 iice_inst_0.b3_SoW.b9_v_mzCDYXs[10] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[10] 0.364 968.877 iice_inst_0.b3_SoW.b9_v_mzCDYXs[6] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[6] 0.364 968.896 iice_inst_0.b3_SoW.b9_v_mzCDYXs[13] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[13] 0.364 968.896 iice_inst_0.b3_SoW.b9_v_mzCDYXs[9] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[9] 0.364 968.938 iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[7] 0.364 968.954 iice_inst_0.b3_SoW.b9_v_mzCDYXs[14] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[14] 0.364 968.954 iice_inst_0.b3_SoW.b9_v_mzCDYXs[2] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[2] 0.364 968.957 iice_inst_0.b3_SoW.b9_v_mzCDYXs[15] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[15] 0.364 968.957 ========================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------------------------------------- iice_inst_0.b3_SoW.b9_v_mzCDYXs[15] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[15] 999.690 967.884 iice_inst_0.b3_SoW.b9_v_mzCDYXs[14] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[14] 999.690 968.841 iice_inst_0.b3_SoW.b9_v_mzCDYXs[13] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[13] 999.690 969.271 iice_inst_0.b3_SoW.b9_v_mzCDYXs[11] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[11] 999.690 969.691 iice_inst_0.b3_SoW.b9_v_mzCDYXs[12] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[12] 999.690 970.228 iice_inst_0.b3_SoW.b9_v_mzCDYXs[10] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[10] 999.690 970.648 iice_inst_0.b3_SoW.b9_v_mzCDYXs[9] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[9] 999.690 971.078 iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[7] 999.690 971.918 iice_inst_0.b3_SoW.b9_v_mzCDYXs[8] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[8] 999.690 972.035 iice_inst_0.b3_SoW.b9_v_mzCDYXs[6] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[6] 999.690 972.875 ============================================================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.310 = Required time: 999.690 - Propagation time: 31.806 = Slack (non-critical) : 967.884 Number of logic level(s): 15 Starting point: iice_inst_0.b3_SoW.b9_v_mzCDYXs[11] / Q Ending point: iice_inst_0.b3_SoW.b9_v_mzCDYXs[15] / D The start point is clocked by jtag_interface|b3_PK3_inferred_clock [rising] on pin CLK The end point is clocked by jtag_interface|b3_PK3_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ---------------------------------------------------------------------------------------------------------------------- iice_inst_0.b3_SoW.b9_v_mzCDYXs[11] DFN1 Q Out 0.364 0.364 - b9_v_mzCDYXs[11] Net - - 6.980 - 420 iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_2 NOR2B B In - 7.344 - iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_2 NOR2B Y Out 0.351 7.695 - un10_b11_vfsg_9urxbb_2 Net - - 0.630 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_10 NOR3C C In - 8.325 - iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_10 NOR3C Y Out 0.370 8.695 - un10_b11_vfsg_9urxbb_10 Net - - 0.630 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_12 NOR3C C In - 9.325 - iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_12 NOR3C Y Out 0.370 9.695 - un10_b11_vfsg_9urxbb_12 Net - - 0.630 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb NOR3C C In - 10.325 - iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb NOR3C Y Out 0.370 10.695 - un10_b11_vfsg_9urxbb Net - - 0.630 - 1 iice_inst_0.b3_SoW.b9_v_mzCDYXs_1_sqmuxa NOR3A C In - 11.325 - iice_inst_0.b3_SoW.b9_v_mzCDYXs_1_sqmuxa NOR3A Y Out 0.403 11.728 - b9_v_mzCDYXs_1_sqmuxa Net - - 5.250 - 19 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_3 AND2 A In - 16.978 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_3 AND2 Y Out 0.293 17.271 - DWACT_ADD_CI_0_TMP[2] Net - - 0.630 - 1 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_4 OR3 C In - 17.901 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_4 OR3 Y Out 0.416 18.317 - DWACT_ADD_CI_0_g_array_0[0] Net - - 1.060 - 2 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_79 AO1 B In - 19.377 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_79 AO1 Y Out 0.327 19.704 - DWACT_ADD_CI_0_g_array_1[0] Net - - 1.480 - 3 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_85 AO1 B In - 21.184 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_85 AO1 Y Out 0.327 21.511 - DWACT_ADD_CI_0_g_array_2[0] Net - - 1.900 - 4 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_71 AO1 B In - 23.411 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_71 AO1 Y Out 0.327 23.738 - DWACT_ADD_CI_0_g_array_3[0] Net - - 1.900 - 4 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_75 AO1 B In - 25.637 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_75 AO1 Y Out 0.327 25.964 - DWACT_ADD_CI_0_g_array_10[0] Net - - 1.480 - 3 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_90 AO1 B In - 27.444 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_90 AO1 Y Out 0.327 27.771 - DWACT_ADD_CI_0_g_array_11_2[0] Net - - 1.060 - 2 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_88 AO1 B In - 28.831 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_88 AO1 Y Out 0.327 29.158 - DWACT_ADD_CI_0_g_array_12_6[0] Net - - 0.630 - 1 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_66 XOR2 B In - 29.788 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_66 XOR2 Y Out 0.520 30.308 - I_66_0 Net - - 0.630 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.b9_v_mzCDYXs_5[15] OA1A C In - 30.938 - iice_inst_0.b3_SoW.b8_vFsG_vuY.b9_v_mzCDYXs_5[15] OA1A Y Out 0.238 31.176 - b9_v_mzCDYXs_5[15] Net - - 0.630 - 1 iice_inst_0.b3_SoW.b9_v_mzCDYXs[15] DFN1 D In - 31.806 - ====================================================================================================================== Total path delay (propagation time + setup) of 32.116 is 5.966(18.6%) logic and 26.150(81.4%) route. ==================================== Detailed Report for Clock: jtag_interface|b7_oSD_3vW_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------------------ comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[0] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[0] 0.364 994.618 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[1] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[1] 0.364 998.166 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[2] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[2] 0.364 998.166 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[3] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[3] 0.364 998.166 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[4] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[4] 0.364 998.166 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[5] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[5] 0.364 998.166 ====================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------------------------------------------------------------- comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw jtag_interface|b7_oSD_3vW_inferred_clock UJTAG UTDO b6_PLF_Bq 997.000 994.618 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[0] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[1] 999.590 998.166 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[1] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[2] 999.590 998.166 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[2] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[3] 999.590 998.166 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[3] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[4] 999.590 998.166 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[4] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[5] 999.590 998.166 =========================================================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 3.000 = Required time: 997.000 - Propagation time: 2.382 = Slack (non-critical) : 994.618 Number of logic level(s): 1 Starting point: comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[0] / Q Ending point: comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw / UTDO The start point is clocked by jtag_interface|b7_oSD_3vW_inferred_clock [rising] on pin CLK The end point is clocked by jtag_interface|b7_oSD_3vW_inferred_clock [rising] Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) -------------------------------------------------------------------------------------------------------------- comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[0] DFN1E1 Q Out 0.364 0.364 - b9_OvyH3_saL[0] Net - - 1.060 - 2 comm_block_inst.b7_Rcmi_ql.b3_PLF MX2 A In - 1.424 - comm_block_inst.b7_Rcmi_ql.b3_PLF MX2 Y Out 0.328 1.752 - b6_PLF_Bq Net - - 0.630 - 1 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw UJTAG UTDO In - 2.382 - ============================================================================================================== Total path delay (propagation time + setup) of 5.382 is 3.692(68.6%) logic and 1.690(31.4%) route. ==================================== Detailed Report for Clock: jtag_interface|identify_clk2_no_clk_buffer_needed ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b8_vABZ3qsY jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1C1 Q b8_vABZ3qsY 0.364 972.771 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[3] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b13_nvmFL_fx2rbuQ[2] 0.364 986.326 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[2] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b13_nvmFL_fx2rbuQ[1] 0.364 986.487 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[1] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b13_nvmFL_fx2rbuQ[0] 0.364 987.959 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[5] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b12_ORbIwXaEF_bd 0.364 988.530 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[0] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b11_uRrc_WYOFjZ[0] 0.364 988.668 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[4] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b13_nvmFL_fx2rbuQ[3] 0.364 989.917 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[0] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 Q b6_nUT_IF[0] 0.364 998.596 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[1] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 Q b6_nUT_IF[1] 0.364 998.596 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[2] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 Q b6_nUT_IF[2] 0.364 998.596 ======================================================================================================================================================================================= Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- iice_inst_0.b3_SoW.b9_2_mzCDYXs[15] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1 D b9_2_mzCDYXs_5_i[15] 999.690 972.771 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[15] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1 D b7_nYhI39s_19[15] 999.690 973.492 iice_inst_0.b3_SoW.b9_2_mzCDYXs[14] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1 D b9_2_mzCDYXs_5_i[14] 999.690 973.728 iice_inst_0.b3_SoW.b9_2_mzCDYXs[13] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1 D b9_2_mzCDYXs_5_i[13] 999.690 974.158 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[14] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1 D b7_nYhI39s_19[14] 999.690 974.449 iice_inst_0.b3_SoW.b9_2_mzCDYXs[11] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1 D b9_2_mzCDYXs_5_i[11] 999.690 974.578 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[13] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1 D b7_nYhI39s_19[13] 999.690 974.879 iice_inst_0.b3_SoW.b3_SoW.ramSliceInst2.GenericRAMInst156.syn_block_ram jtag_interface|identify_clk2_no_clk_buffer_needed RAM512X18 WEN loc_wen 998.930 974.948 iice_inst_0.b3_SoW.b3_SoW.ramSliceInst2.GenericRAMInst200.syn_block_ram jtag_interface|identify_clk2_no_clk_buffer_needed RAM512X18 WEN loc_wen 998.930 974.948 iice_inst_0.b3_SoW.b3_SoW.ramSliceInst0.GenericRAMInst144.syn_block_ram jtag_interface|identify_clk2_no_clk_buffer_needed RAM512X18 WEN loc_wen 998.930 974.948 ===================================================================================================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.310 = Required time: 999.690 - Propagation time: 26.919 = Slack (non-critical) : 972.771 Number of logic level(s): 14 Starting point: iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b8_vABZ3qsY / Q Ending point: iice_inst_0.b3_SoW.b9_2_mzCDYXs[15] / D The start point is clocked by jtag_interface|identify_clk2_no_clk_buffer_needed [rising] on pin CLK The end point is clocked by jtag_interface|identify_clk2_no_clk_buffer_needed [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ---------------------------------------------------------------------------------------------------------------------------------- iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b8_vABZ3qsY DFN1E1C1 Q Out 0.364 0.364 - b8_vABZ3qsY Net - - 0.630 - 1 iice_inst_0.b7_12mFLWM.b5_nUTGT.b10_Ocm0f_kKwf.un15_b8_vabz3qsy OAI1 C In - 0.994 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b10_Ocm0f_kKwf.un15_b8_vabz3qsy OAI1 Y Out 0.363 1.357 - un15_b8_vabz3qsy Net - - 1.060 - 2 iice_inst_0.b7_12mFLWM.b5_nUTGT.b9_OFWNT9_ab_i_a3_0_1 NOR2 A In - 2.417 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b9_OFWNT9_ab_i_a3_0_1 NOR2 Y Out 0.287 2.704 - N_226_1 Net - - 1.900 - 4 iice_inst_0.b7_12mFLWM.b5_nUTGT.b9_OFWNT9_ab_i AO1B A In - 4.604 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b9_OFWNT9_ab_i AO1B Y Out 0.286 4.890 - b9_OFWNT9_ab_i Net - - 5.250 - 19 iice_inst_0.b3_SoW.b8_jAA_KlCO_1_sqmuxa_0_a2 NOR3 C In - 10.140 - iice_inst_0.b3_SoW.b8_jAA_KlCO_1_sqmuxa_0_a2 NOR3 Y Out 0.416 10.556 - b8_jAA_KlCO_1_sqmuxa Net - - 1.480 - 3 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_3 AND2 A In - 12.036 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_3 AND2 Y Out 0.293 12.329 - DWACT_ADD_CI_0_TMP_0[2] Net - - 0.630 - 1 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_4 OR3 C In - 12.959 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_4 OR3 Y Out 0.416 13.375 - DWACT_ADD_CI_0_g_array_0_0[0] Net - - 1.060 - 2 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_79 AO1 B In - 14.435 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_79 AO1 Y Out 0.327 14.762 - DWACT_ADD_CI_0_g_array_1_0[0] Net - - 1.480 - 3 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_85 AO1 B In - 16.242 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_85 AO1 Y Out 0.327 16.569 - DWACT_ADD_CI_0_g_array_2_0[0] Net - - 1.900 - 4 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_71 AO1 B In - 18.469 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_71 AO1 Y Out 0.327 18.796 - DWACT_ADD_CI_0_g_array_3_0[0] Net - - 1.900 - 4 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_75 AO1 B In - 20.696 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_75 AO1 Y Out 0.327 21.023 - DWACT_ADD_CI_0_g_array_10_0[0] Net - - 1.480 - 3 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_90 AO1 B In - 22.503 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_90 AO1 Y Out 0.327 22.829 - DWACT_ADD_CI_0_g_array_11_2_0[0] Net - - 1.060 - 2 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_88 AO1 B In - 23.889 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_88 AO1 Y Out 0.327 24.216 - DWACT_ADD_CI_0_g_array_12_6_0[0] Net - - 0.630 - 1 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_66 XOR2 B In - 24.846 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_66 XOR2 Y Out 0.520 25.366 - I_66_1 Net - - 0.630 - 1 iice_inst_0.b3_SoW.b8_2FsG_vuY.b9_2_mzCDYXs_5_i[15] NOR2B A In - 25.996 - iice_inst_0.b3_SoW.b8_2FsG_vuY.b9_2_mzCDYXs_5_i[15] NOR2B Y Out 0.293 26.289 - b9_2_mzCDYXs_5_i[15] Net - - 0.630 - 1 iice_inst_0.b3_SoW.b9_2_mzCDYXs[15] DFN1 D In - 26.919 - ================================================================================================================================== Total path delay (propagation time + setup) of 27.229 is 5.509(20.2%) logic and 21.720(79.8%) route. ==================================== Detailed Report for Clock: System ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------------- comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG3 b6_uS_MrX[2] 3.000 953.135 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG5 b6_uS_MrX[4] 3.000 953.149 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG4 b6_uS_MrX[3] 3.000 953.275 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG2 b6_uS_MrX[1] 3.000 954.168 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG6 b3_1Um 3.000 954.287 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG1 b6_uS_MrX[0] 3.000 955.120 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UDRCAP b7_nFG0rDY 3.000 956.402 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UDRSH b5_OvyH3 3.000 963.892 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[10] System DFN1 Q b7_nYhI39s[10] 0.364 967.177 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[2] System DFN1 Q b7_nYhI39s[2] 0.364 967.235 ============================================================================================================================ Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------ iice_inst_0.b3_SoW.b9_v_mzCDYXs[15] System DFN1 D b9_v_mzCDYXs_5[15] 999.690 953.135 iice_inst_0.b3_SoW.b9_v_mzCDYXs[14] System DFN1 D b9_v_mzCDYXs_5[14] 999.690 954.092 iice_inst_0.b3_SoW.b9_v_mzCDYXs[13] System DFN1 D b9_v_mzCDYXs_5[13] 999.690 954.522 iice_inst_0.b3_SoW.b9_v_mzCDYXs[11] System DFN1 D b9_v_mzCDYXs_5[11] 999.690 954.942 iice_inst_0.b3_SoW.b9_v_mzCDYXs[12] System DFN1 D b9_v_mzCDYXs_5[12] 999.690 955.479 iice_inst_0.b3_SoW.b9_v_mzCDYXs[10] System DFN1 D b9_v_mzCDYXs_5[10] 999.690 955.899 iice_inst_0.b3_SoW.b9_v_mzCDYXs[9] System DFN1 D b9_v_mzCDYXs_5[9] 999.690 956.329 iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] System DFN1 D b9_v_mzCDYXs_5[7] 999.690 957.169 iice_inst_0.b3_SoW.b9_v_mzCDYXs[8] System DFN1 D b9_v_mzCDYXs_5[8] 999.690 957.286 iice_inst_0.b3_SoW.b9_v_mzCDYXs[6] System DFN1 D b9_v_mzCDYXs_5[6] 999.690 958.126 ================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.310 = Required time: 999.690 - Propagation time: 46.555 = Slack (non-critical) : 953.135 Number of logic level(s): 16 Starting point: comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw / UIREG3 Ending point: iice_inst_0.b3_SoW.b9_v_mzCDYXs[15] / D The start point is clocked by jtag_interface|b3_PK3_inferred_clock [rising] The end point is clocked by jtag_interface|b3_PK3_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ------------------------------------------------------------------------------------------------------------------------ comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw UJTAG UIREG3 Out 0.000 3.000 - b6_uS_MrX[2] Net - - 0.630 - 1 comm_block_inst.jtag_block.jtagi.b9_nv_cLqgOF_2_1 OR3 C In - 3.630 - comm_block_inst.jtag_block.jtagi.b9_nv_cLqgOF_2_1 OR3 Y Out 0.416 4.046 - b9_nv_cLqgOF_2_1 Net - - 1.060 - 2 comm_block_inst.jtag_block.jtagi.b9_nv_cLqgOF_0 OR3A B In - 5.106 - comm_block_inst.jtag_block.jtagi.b9_nv_cLqgOF_0 OR3A Y Out 0.403 5.509 - b9_nv_cLqgOF_0 Net - - 1.900 - 4 comm_block_inst.jtag_block.jtagi.b10_nv_ywKMm9X NOR3B C In - 7.409 - comm_block_inst.jtag_block.jtagi.b10_nv_ywKMm9X NOR3B Y Out 0.276 7.685 - b10_nv_ywKMm9X Net - - 6.180 - 33 I_70 CLKINT A In - 13.865 - I_70 CLKINT Y Out 0.100 13.965 - comm2iice_link_iice_0_a_0[7] Net - - 5.120 - 50 iice_inst_0.b3_SoW.b11_OFWNT9_X1eH.b6_yor0PD_0_sqmuxa OR2B A In - 19.085 - iice_inst_0.b3_SoW.b11_OFWNT9_X1eH.b6_yor0PD_0_sqmuxa OR2B Y Out 0.293 19.378 - b14_voSc3_sr2kFHQz Net - - 6.730 - 55 iice_inst_0.b3_SoW.b9_v_mzCDYXs_1_sqmuxa NOR3A A In - 26.108 - iice_inst_0.b3_SoW.b9_v_mzCDYXs_1_sqmuxa NOR3A Y Out 0.369 26.477 - b9_v_mzCDYXs_1_sqmuxa Net - - 5.250 - 19 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_3 AND2 A In - 31.727 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_3 AND2 Y Out 0.293 32.020 - DWACT_ADD_CI_0_TMP[2] Net - - 0.630 - 1 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_4 OR3 C In - 32.650 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_4 OR3 Y Out 0.416 33.066 - DWACT_ADD_CI_0_g_array_0[0] Net - - 1.060 - 2 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_79 AO1 B In - 34.126 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_79 AO1 Y Out 0.327 34.453 - DWACT_ADD_CI_0_g_array_1[0] Net - - 1.480 - 3 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_85 AO1 B In - 35.933 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_85 AO1 Y Out 0.327 36.260 - DWACT_ADD_CI_0_g_array_2[0] Net - - 1.900 - 4 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_71 AO1 B In - 38.160 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_71 AO1 Y Out 0.327 38.486 - DWACT_ADD_CI_0_g_array_3[0] Net - - 1.900 - 4 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_75 AO1 B In - 40.386 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_75 AO1 Y Out 0.327 40.713 - DWACT_ADD_CI_0_g_array_10[0] Net - - 1.480 - 3 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_90 AO1 B In - 42.193 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_90 AO1 Y Out 0.327 42.520 - DWACT_ADD_CI_0_g_array_11_2[0] Net - - 1.060 - 2 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_88 AO1 B In - 43.580 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_88 AO1 Y Out 0.327 43.907 - DWACT_ADD_CI_0_g_array_12_6[0] Net - - 0.630 - 1 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_66 XOR2 B In - 44.537 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_66 XOR2 Y Out 0.520 45.057 - I_66_0 Net - - 0.630 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.b9_v_mzCDYXs_5[15] OA1A C In - 45.687 - iice_inst_0.b3_SoW.b8_vFsG_vuY.b9_v_mzCDYXs_5[15] OA1A Y Out 0.238 45.925 - b9_v_mzCDYXs_5[15] Net - - 0.630 - 1 iice_inst_0.b3_SoW.b9_v_mzCDYXs[15] DFN1 D In - 46.555 - ======================================================================================================================== Total path delay (propagation time + setup) of 46.865 is 5.595(11.9%) logic and 38.270(81.7%) route. ##### END OF TIMING REPORT #####] -------------------------------------------------------------------------------- Report for cell config_top.rtl Cell usage: cell count area count*area MX2 13462 1.0 13462.0 VCC 853 0.0 0.0 GND 853 0.0 0.0 RAM512X18 768 0.0 0.0 INV 263 1.0 263.0 DFN1 259 1.0 259.0 DFN1E1 200 1.0 200.0 XOR2 186 1.0 186.0 NOR2B 133 1.0 133.0 OR2A 98 1.0 98.0 NOR2 91 1.0 91.0 AND2 91 1.0 91.0 AO1 91 1.0 91.0 OR3B 83 1.0 83.0 OR2B 83 1.0 83.0 OR3 77 1.0 77.0 OR3A 65 1.0 65.0 DFN1C1 63 1.0 63.0 XNOR2 62 1.0 62.0 NOR3C 61 1.0 61.0 DFN1E1C1 55 1.0 55.0 AOI1B 55 1.0 55.0 DFN1E0 54 1.0 54.0 ZOR3I 48 1.0 48.0 NOR2A 43 1.0 43.0 OAI1 37 1.0 37.0 MX2C 37 1.0 37.0 NOR3A 36 1.0 36.0 AX1B 36 1.0 36.0 OR2 22 1.0 22.0 AND3 22 1.0 22.0 NOR3B 19 1.0 19.0 OA1A 19 1.0 19.0 AO1B 17 1.0 17.0 DFN1C0 17 1.0 17.0 XO1 15 1.0 15.0 AO1C 14 1.0 14.0 NOR3 11 1.0 11.0 DFN1P1 10 1.0 10.0 OR3C 9 1.0 9.0 MAJ3 8 1.0 8.0 AO1D 8 1.0 8.0 DFN1E1P1 8 1.0 8.0 DFN0C1 8 1.0 8.0 AX1 7 1.0 7.0 DFN1E1C0 7 1.0 7.0 OA1B 6 1.0 6.0 AOI1 6 1.0 6.0 AO1A 6 1.0 6.0 OA1 5 1.0 5.0 BUFF 5 1.0 5.0 AX1C 4 1.0 4.0 AO16 4 1.0 4.0 XA1C 3 1.0 3.0 XA1A 2 1.0 2.0 XA1B 2 1.0 2.0 INBUF 2 0.0 0.0 CLKINT 2 0.0 0.0 CLKBUF 2 0.0 0.0 MX2B 2 1.0 2.0 NVM 2 0.0 0.0 BIBUF 1 0.0 0.0 PLL 1 0.0 0.0 AO13 1 1.0 1.0 RAM4K9 1 0.0 0.0 MIN3 1 1.0 1.0 RCOSC 1 0.0 0.0 UJTAG 1 0.0 0.0 XNOR3 1 1.0 1.0 ----- ---------- TOTAL 18525 16038.0 Mapper successful! Process took 0h:02m:48s realtime, 0h:02m:44s cputime # Thu Feb 08 18:18:31 2007 ###########################################################]