-- C:\Documents and Settings\nguyend\workspace_backup\BSDL\src\Work/9_0_0_17_rel9/9_0_0_17_rel9_bsdl/common/A54SX08_PL84.bsd -- FAMILY: 54SX -- DEVICE: A54SX08 -- PACKAGE: 84 PLCC -- DESIGNER VERSION: 9.0.0.17 -- RESTRICT JTAG: 0 -- RESTRICT TRST: 0 -- -- This is a preliminary BSDL file which has not been verified. -- This BSDL file reflects the pre-programming JTAG -- behavior. To reflect the post-programming JTAG -- behavior, edit this file as described below: -- If the I/O is unused or configured as an output, -- the input boundary scan cell becomes internal only. -- The input buffer is turned off, and you can not -- transfer data from the I/O pad into the input scan -- cell. For example: -- IO(1) is an output, the BSDL entry would be modified -- from: -- " 0 (BC_1, IO(1), input, X), "& -- " 1 (BC_1, IO(1), output3, X, 2, 0, Z), "& -- " 2 (BC_1, *, control, 0), "& -- to: -- " 0 (BC_1, *, internal, X), "& -- " 1 (BC_1, IO(1), output3, X, 2, 0, Z), "& -- " 2 (BC_1, *, control, 0), "& -- No modification is necessary when the I/O is -- configured as an input. entity A54SX08lcc84 is generic (PHYSICAL_PIN_MAP : string := "lcc84"); port( CLKA :in bit; CLKB :in bit; GND :linkage bit_vector (0 to 4 ); HCLK :in bit; IO_4 :out bit; IO_5 :out bit; IO_6 :out bit; IO_8 :out bit; IO_9 :out bit; IO_10 :out bit; IO_13 :out bit; IO_14 :out bit; IO_15 :out bit; IO_17 :out bit; IO_18 :out bit; IO_19 :out bit; IO_20 :out bit; IO_21 :out bit; IO_22 :out bit; IO_23 :out bit; IO_24 :out bit; IO_25 :out bit; IO_26 :out bit; IO_29 :out bit; IO_30 :out bit; IO_31 :out bit; IO_32 :out bit; IO_33 :out bit; IO_34 :out bit; IO_35 :out bit; IO_36 :out bit; IO_37 :out bit; IO_38 :out bit; IO_39 :out bit; IO_40 :out bit; IO_44 :out bit; IO_46 :out bit; IO_47 :out bit; IO_48 :out bit; IO_49 :out bit; IO_50 :out bit; IO_51 :out bit; IO_53 :out bit; IO_54 :out bit; IO_55 :out bit; IO_56 :out bit; IO_57 :out bit; IO_58 :out bit; IO_62 :out bit; IO_63 :out bit; IO_64 :out bit; IO_65 :out bit; IO_66 :out bit; IO_67 :out bit; IO_70 :out bit; IO_71 :out bit; IO_72 :out bit; IO_73 :out bit; IO_74 :out bit; IO_75 :out bit; IO_76 :out bit; IO_77 :out bit; IO_78 :out bit; IO_79 :out bit; IO_80 :out bit; IO_81 :out bit; IO_82 :out bit; TCK :in bit; TDI :in bit; TDO :out bit; TMS :in bit; VCC :linkage bit_vector (0 to 8 ) ); use STD_1149_1_1990.all; attribute PIN_MAP of A54SX08lcc84 : entity is PHYSICAL_PIN_MAP; constant lcc84 : PIN_MAP_STRING:= "CLKA :83, "& "CLKB :84, "& "GND :(2, 27, 42, 61, 69), "& "HCLK :45, "& "IO_4 :4, "& "IO_5 :5, "& "IO_6 :6, "& "IO_8 :8, "& "IO_9 :9, "& "IO_10 :10, "& "IO_13 :13, "& "IO_14 :14, "& "IO_15 :15, "& "IO_17 :17, "& "IO_18 :18, "& "IO_19 :19, "& "IO_20 :20, "& "IO_21 :21, "& "IO_22 :22, "& "IO_23 :23, "& "IO_24 :24, "& "IO_25 :25, "& "IO_26 :26, "& "IO_29 :29, "& "IO_30 :30, "& "IO_31 :31, "& "IO_32 :32, "& "IO_33 :33, "& "IO_34 :34, "& "IO_35 :35, "& "IO_36 :36, "& "IO_37 :37, "& "IO_38 :38, "& "IO_39 :39, "& "IO_40 :40, "& "IO_44 :44, "& "IO_46 :46, "& "IO_47 :47, "& "IO_48 :48, "& "IO_49 :49, "& "IO_50 :50, "& "IO_51 :51, "& "IO_53 :53, "& "IO_54 :54, "& "IO_55 :55, "& "IO_56 :56, "& "IO_57 :57, "& "IO_58 :58, "& "IO_62 :62, "& "IO_63 :63, "& "IO_64 :64, "& "IO_65 :65, "& "IO_66 :66, "& "IO_67 :67, "& "IO_70 :70, "& "IO_71 :71, "& "IO_72 :72, "& "IO_73 :73, "& "IO_74 :74, "& "IO_75 :75, "& "IO_76 :76, "& "IO_77 :77, "& "IO_78 :78, "& "IO_79 :79, "& "IO_80 :80, "& "IO_81 :81, "& "IO_82 :82, "& "TCK :11, "& "TDI :12, "& "TDO :52, "& "TMS :16, "& "VCC :(1, 28, 3, 41, 43, 59, 60, "& "68, 7) "; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is ( 1.00e+007, BOTH); attribute INSTRUCTION_LENGTH of A54SX08lcc84 : entity is 5; attribute INSTRUCTION_OPCODE of A54SX08lcc84 : entity is "EXTEST (00000), "& "SAMPLE (00001), "& "INTEST (00010), "& "USERCODE (00011), "& "IDCODE (00100), "& "HIGHZ (01110), "& "CLAMP (01111), "& "PROBE (10000), "& "BYPASS (11111) "; attribute INSTRUCTION_CAPTURE of A54SX08lcc84 : entity is "XXX01"; attribute INSTRUCTION_DISABLE of A54SX08lcc84 : entity is "HIGHZ"; attribute INSTRUCTION_GUARD of A54SX08lcc84 : entity is "CLAMP"; attribute INSTRUCTION_PRIVATE of A54SX08lcc84 : entity is "PROBE"; attribute IDCODE_REGISTER of A54SX08lcc84 : entity is "XXXX"& -- Version "XXXXXXXXXXXXXXXX"& -- Device "00000101111"& -- Manufacturer "1"; -- Required attribute USERCODE_REGISTER of A54SX08lcc84 : entity is "00000000000000000000000000000000"; attribute REGISTER_ACCESS of A54SX08lcc84 : entity is "BYPASS(HIGHZ, CLAMP)"; attribute BOUNDARY_CELLS of A54SX08lcc84 : entity is "BC_1"; attribute BOUNDARY_LENGTH of A54SX08lcc84 : entity is 381; attribute BOUNDARY_REGISTER of A54SX08lcc84 : entity is -- num cell port function safe [ccell disval rslt] --BSR IO_32 32 " 0 (BC_1, *,internal, X), "& " 1 (BC_1, IO_32, output3, X, 2, 0, Z), "& " 2 (BC_1, *, control, 0), "& --BSR NC " 3 (BC_1, *,internal, X), "& " 4 (BC_1, *,internal, X), "& " 5 (BC_1, *,internal, X), "& --BSR NC " 6 (BC_1, *,internal, X), "& " 7 (BC_1, *,internal, X), "& " 8 (BC_1, *,internal, X), "& --BSR IO_31 31 " 9 (BC_1, *,internal, X), "& " 10 (BC_1, IO_31, output3, X, 11, 0, Z), "& " 11 (BC_1, *, control, 0), "& --BSR NC " 12 (BC_1, *,internal, X), "& " 13 (BC_1, *,internal, X), "& " 14 (BC_1, *,internal, X), "& --BSR IO_30 30 " 15 (BC_1, *,internal, X), "& " 16 (BC_1, IO_30, output3, X, 17, 0, Z), "& " 17 (BC_1, *, control, 0), "& --BSR NC " 18 (BC_1, *,internal, X), "& " 19 (BC_1, *,internal, X), "& " 20 (BC_1, *,internal, X), "& --BSR IO_29 29 " 21 (BC_1, *,internal, X), "& " 22 (BC_1, IO_29, output3, X, 23, 0, Z), "& " 23 (BC_1, *, control, 0), "& --BSR IO_26 26 " 24 (BC_1, *,internal, X), "& " 25 (BC_1, IO_26, output3, X, 26, 0, Z), "& " 26 (BC_1, *, control, 0), "& --BSR IO_25 25 " 27 (BC_1, *,internal, X), "& " 28 (BC_1, IO_25, output3, X, 29, 0, Z), "& " 29 (BC_1, *, control, 0), "& --BSR IO_24 24 " 30 (BC_1, *,internal, X), "& " 31 (BC_1, IO_24, output3, X, 32, 0, Z), "& " 32 (BC_1, *, control, 0), "& --BSR NC " 33 (BC_1, *,internal, X), "& " 34 (BC_1, *,internal, X), "& " 35 (BC_1, *,internal, X), "& --BSR IO_23 23 " 36 (BC_1, *,internal, X), "& " 37 (BC_1, IO_23, output3, X, 38, 0, Z), "& " 38 (BC_1, *, control, 0), "& --BSR NC " 39 (BC_1, *,internal, X), "& " 40 (BC_1, *,internal, X), "& " 41 (BC_1, *,internal, X), "& --BSR IO_22 22 " 42 (BC_1, *,internal, X), "& " 43 (BC_1, IO_22, output3, X, 44, 0, Z), "& " 44 (BC_1, *, control, 0), "& --BSR NC " 45 (BC_1, *,internal, X), "& " 46 (BC_1, *,internal, X), "& " 47 (BC_1, *,internal, X), "& --BSR NC " 48 (BC_1, *,internal, X), "& " 49 (BC_1, *,internal, X), "& " 50 (BC_1, *,internal, X), "& --BSR IO_21 21 " 51 (BC_1, *,internal, X), "& " 52 (BC_1, IO_21, output3, X, 53, 0, Z), "& " 53 (BC_1, *, control, 0), "& --BSR NC " 54 (BC_1, *,internal, X), "& " 55 (BC_1, *,internal, X), "& " 56 (BC_1, *,internal, X), "& --BSR IO_20 20 " 57 (BC_1, *,internal, X), "& " 58 (BC_1, IO_20, output3, X, 59, 0, Z), "& " 59 (BC_1, *, control, 0), "& --BSR IO_19 19 " 60 (BC_1, *,internal, X), "& " 61 (BC_1, IO_19, output3, X, 62, 0, Z), "& " 62 (BC_1, *, control, 0), "& --BSR NC " 63 (BC_1, *,internal, X), "& " 64 (BC_1, *,internal, X), "& " 65 (BC_1, *,internal, X), "& --BSR IO_18 18 " 66 (BC_1, *,internal, X), "& " 67 (BC_1, IO_18, output3, X, 68, 0, Z), "& " 68 (BC_1, *, control, 0), "& --BSR IO_17 17 " 69 (BC_1, *,internal, X), "& " 70 (BC_1, IO_17, output3, X, 71, 0, Z), "& " 71 (BC_1, *, control, 0), "& --BSR NC " 72 (BC_1, *,internal, X), "& " 73 (BC_1, *,internal, X), "& " 74 (BC_1, *,internal, X), "& --BSR IO_15 15 " 75 (BC_1, *,internal, X), "& " 76 (BC_1, IO_15, output3, X, 77, 0, Z), "& " 77 (BC_1, *, control, 0), "& --BSR NC " 78 (BC_1, *,internal, X), "& " 79 (BC_1, *,internal, X), "& " 80 (BC_1, *,internal, X), "& --BSR IO_14 14 " 81 (BC_1, *,internal, X), "& " 82 (BC_1, IO_14, output3, X, 83, 0, Z), "& " 83 (BC_1, *, control, 0), "& --BSR NC " 84 (BC_1, *,internal, X), "& " 85 (BC_1, *,internal, X), "& " 86 (BC_1, *,internal, X), "& --BSR IO_13 13 " 87 (BC_1, *,internal, X), "& " 88 (BC_1, IO_13, output3, X, 89, 0, Z), "& " 89 (BC_1, *, control, 0), "& --BSR IO_10 10 " 90 (BC_1, *,internal, X), "& " 91 (BC_1, IO_10, output3, X, 92, 0, Z), "& " 92 (BC_1, *, control, 0), "& --BSR IO_9 9 " 93 (BC_1, *,internal, X), "& " 94 (BC_1, IO_9, output3, X, 95, 0, Z), "& " 95 (BC_1, *, control, 0), "& --BSR IO_8 8 " 96 (BC_1, *,internal, X), "& " 97 (BC_1, IO_8, output3, X, 98, 0, Z), "& " 98 (BC_1, *, control, 0), "& --BSR NC " 99 (BC_1, *,internal, X), "& " 100 (BC_1, *,internal, X), "& " 101 (BC_1, *,internal, X), "& --BSR IO_6 6 " 102 (BC_1, *,internal, X), "& " 103 (BC_1, IO_6, output3, X, 104, 0, Z), "& " 104 (BC_1, *, control, 0), "& --BSR NC " 105 (BC_1, *,internal, X), "& " 106 (BC_1, *,internal, X), "& " 107 (BC_1, *,internal, X), "& --BSR NC " 108 (BC_1, *,internal, X), "& " 109 (BC_1, *,internal, X), "& " 110 (BC_1, *,internal, X), "& --BSR IO_5 5 " 111 (BC_1, *,internal, X), "& " 112 (BC_1, IO_5, output3, X, 113, 0, Z), "& " 113 (BC_1, *, control, 0), "& --BSR NC " 114 (BC_1, *,internal, X), "& " 115 (BC_1, *,internal, X), "& " 116 (BC_1, *,internal, X), "& --BSR NC " 117 (BC_1, *,internal, X), "& " 118 (BC_1, *,internal, X), "& " 119 (BC_1, *,internal, X), "& --BSR NC " 120 (BC_1, *,internal, X), "& " 121 (BC_1, *,internal, X), "& " 122 (BC_1, *,internal, X), "& --BSR NC " 123 (BC_1, *,internal, X), "& " 124 (BC_1, *,internal, X), "& " 125 (BC_1, *,internal, X), "& --BSR NC " 126 (BC_1, *,internal, X), "& " 127 (BC_1, *,internal, X), "& " 128 (BC_1, *,internal, X), "& --BSR IO_4 4 " 129 (BC_1, *,internal, X), "& " 130 (BC_1, IO_4, output3, X, 131, 0, Z), "& " 131 (BC_1, *, control, 0), "& --BSR NC " 132 (BC_1, *,internal, X), "& " 133 (BC_1, *,internal, X), "& " 134 (BC_1, *,internal, X), "& --BSR CLKB 84 " 135 (BC_1, CLKB, input, X), "& --BSR CLKA 83 " 136 (BC_1, CLKA, input, X), "& --BSR NC " 137 (BC_1, *,internal, X), "& " 138 (BC_1, *,internal, X), "& " 139 (BC_1, *,internal, X), "& --BSR IO_82 82 " 140 (BC_1, *,internal, X), "& " 141 (BC_1, IO_82, output3, X, 142, 0, Z), "& " 142 (BC_1, *, control, 0), "& --BSR IO_81 81 " 143 (BC_1, *,internal, X), "& " 144 (BC_1, IO_81, output3, X, 145, 0, Z), "& " 145 (BC_1, *, control, 0), "& --BSR NC " 146 (BC_1, *,internal, X), "& " 147 (BC_1, *,internal, X), "& " 148 (BC_1, *,internal, X), "& --BSR IO_80 80 " 149 (BC_1, *,internal, X), "& " 150 (BC_1, IO_80, output3, X, 151, 0, Z), "& " 151 (BC_1, *, control, 0), "& --BSR NC " 152 (BC_1, *,internal, X), "& " 153 (BC_1, *,internal, X), "& " 154 (BC_1, *,internal, X), "& --BSR IO_79 79 " 155 (BC_1, *,internal, X), "& " 156 (BC_1, IO_79, output3, X, 157, 0, Z), "& " 157 (BC_1, *, control, 0), "& --BSR NC " 158 (BC_1, *,internal, X), "& " 159 (BC_1, *,internal, X), "& " 160 (BC_1, *,internal, X), "& --BSR NC " 161 (BC_1, *,internal, X), "& " 162 (BC_1, *,internal, X), "& " 163 (BC_1, *,internal, X), "& --BSR IO_78 78 " 164 (BC_1, *,internal, X), "& " 165 (BC_1, IO_78, output3, X, 166, 0, Z), "& " 166 (BC_1, *, control, 0), "& --BSR NC " 167 (BC_1, *,internal, X), "& " 168 (BC_1, *,internal, X), "& " 169 (BC_1, *,internal, X), "& --BSR NC " 170 (BC_1, *,internal, X), "& " 171 (BC_1, *,internal, X), "& " 172 (BC_1, *,internal, X), "& --BSR NC " 173 (BC_1, *,internal, X), "& " 174 (BC_1, *,internal, X), "& " 175 (BC_1, *,internal, X), "& --BSR NC " 176 (BC_1, *,internal, X), "& " 177 (BC_1, *,internal, X), "& " 178 (BC_1, *,internal, X), "& --BSR IO_77 77 " 179 (BC_1, *,internal, X), "& " 180 (BC_1, IO_77, output3, X, 181, 0, Z), "& " 181 (BC_1, *, control, 0), "& --BSR IO_76 76 " 182 (BC_1, *,internal, X), "& " 183 (BC_1, IO_76, output3, X, 184, 0, Z), "& " 184 (BC_1, *, control, 0), "& --BSR IO_75 75 " 185 (BC_1, *,internal, X), "& " 186 (BC_1, IO_75, output3, X, 187, 0, Z), "& " 187 (BC_1, *, control, 0), "& --BSR IO_74 74 " 188 (BC_1, *,internal, X), "& " 189 (BC_1, IO_74, output3, X, 190, 0, Z), "& " 190 (BC_1, *, control, 0), "& --BSR NC " 191 (BC_1, *,internal, X), "& " 192 (BC_1, *,internal, X), "& " 193 (BC_1, *,internal, X), "& --BSR IO_73 73 " 194 (BC_1, *,internal, X), "& " 195 (BC_1, IO_73, output3, X, 196, 0, Z), "& " 196 (BC_1, *, control, 0), "& --BSR IO_72 72 " 197 (BC_1, *,internal, X), "& " 198 (BC_1, IO_72, output3, X, 199, 0, Z), "& " 199 (BC_1, *, control, 0), "& --BSR IO_71 71 " 200 (BC_1, *,internal, X), "& " 201 (BC_1, IO_71, output3, X, 202, 0, Z), "& " 202 (BC_1, *, control, 0), "& --BSR IO_70 70 " 203 (BC_1, *,internal, X), "& " 204 (BC_1, IO_70, output3, X, 205, 0, Z), "& " 205 (BC_1, *, control, 0), "& --BSR NC " 206 (BC_1, *,internal, X), "& " 207 (BC_1, *,internal, X), "& " 208 (BC_1, *,internal, X), "& --BSR IO_67 67 " 209 (BC_1, *,internal, X), "& " 210 (BC_1, IO_67, output3, X, 211, 0, Z), "& " 211 (BC_1, *, control, 0), "& --BSR IO_66 66 " 212 (BC_1, *,internal, X), "& " 213 (BC_1, IO_66, output3, X, 214, 0, Z), "& " 214 (BC_1, *, control, 0), "& --BSR NC " 215 (BC_1, *,internal, X), "& " 216 (BC_1, *,internal, X), "& " 217 (BC_1, *,internal, X), "& --BSR IO_65 65 " 218 (BC_1, *,internal, X), "& " 219 (BC_1, IO_65, output3, X, 220, 0, Z), "& " 220 (BC_1, *, control, 0), "& --BSR NC " 221 (BC_1, *,internal, X), "& " 222 (BC_1, *,internal, X), "& " 223 (BC_1, *,internal, X), "& --BSR NC " 224 (BC_1, *,internal, X), "& " 225 (BC_1, *,internal, X), "& " 226 (BC_1, *,internal, X), "& --BSR IO_64 64 " 227 (BC_1, *,internal, X), "& " 228 (BC_1, IO_64, output3, X, 229, 0, Z), "& " 229 (BC_1, *, control, 0), "& --BSR NC " 230 (BC_1, *,internal, X), "& " 231 (BC_1, *,internal, X), "& " 232 (BC_1, *,internal, X), "& --BSR NC " 233 (BC_1, *,internal, X), "& " 234 (BC_1, *,internal, X), "& " 235 (BC_1, *,internal, X), "& --BSR NC " 236 (BC_1, *,internal, X), "& " 237 (BC_1, *,internal, X), "& " 238 (BC_1, *,internal, X), "& --BSR NC " 239 (BC_1, *,internal, X), "& " 240 (BC_1, *,internal, X), "& " 241 (BC_1, *,internal, X), "& --BSR IO_63 63 " 242 (BC_1, *,internal, X), "& " 243 (BC_1, IO_63, output3, X, 244, 0, Z), "& " 244 (BC_1, *, control, 0), "& --BSR NC " 245 (BC_1, *,internal, X), "& " 246 (BC_1, *,internal, X), "& " 247 (BC_1, *,internal, X), "& --BSR IO_62 62 " 248 (BC_1, *,internal, X), "& " 249 (BC_1, IO_62, output3, X, 250, 0, Z), "& " 250 (BC_1, *, control, 0), "& --BSR NC " 251 (BC_1, *,internal, X), "& " 252 (BC_1, *,internal, X), "& " 253 (BC_1, *,internal, X), "& --BSR NC " 254 (BC_1, *,internal, X), "& " 255 (BC_1, *,internal, X), "& " 256 (BC_1, *,internal, X), "& --BSR NC " 257 (BC_1, *,internal, X), "& " 258 (BC_1, *,internal, X), "& " 259 (BC_1, *,internal, X), "& --BSR IO_58 58 " 260 (BC_1, *,internal, X), "& " 261 (BC_1, IO_58, output3, X, 262, 0, Z), "& " 262 (BC_1, *, control, 0), "& --BSR IO_57 57 " 263 (BC_1, *,internal, X), "& " 264 (BC_1, IO_57, output3, X, 265, 0, Z), "& " 265 (BC_1, *, control, 0), "& --BSR IO_56 56 " 266 (BC_1, *,internal, X), "& " 267 (BC_1, IO_56, output3, X, 268, 0, Z), "& " 268 (BC_1, *, control, 0), "& --BSR IO_55 55 " 269 (BC_1, *,internal, X), "& " 270 (BC_1, IO_55, output3, X, 271, 0, Z), "& " 271 (BC_1, *, control, 0), "& --BSR IO_54 54 " 272 (BC_1, *,internal, X), "& " 273 (BC_1, IO_54, output3, X, 274, 0, Z), "& " 274 (BC_1, *, control, 0), "& --BSR NC " 275 (BC_1, *,internal, X), "& " 276 (BC_1, *,internal, X), "& " 277 (BC_1, *,internal, X), "& --BSR IO_53 53 " 278 (BC_1, *,internal, X), "& " 279 (BC_1, IO_53, output3, X, 280, 0, Z), "& " 280 (BC_1, *, control, 0), "& --BSR NC " 281 (BC_1, *,internal, X), "& " 282 (BC_1, *,internal, X), "& " 283 (BC_1, *,internal, X), "& --BSR NC " 284 (BC_1, *,internal, X), "& " 285 (BC_1, *,internal, X), "& " 286 (BC_1, *,internal, X), "& --BSR IO_51 51 " 287 (BC_1, *,internal, X), "& " 288 (BC_1, IO_51, output3, X, 289, 0, Z), "& " 289 (BC_1, *, control, 0), "& --BSR NC " 290 (BC_1, *,internal, X), "& " 291 (BC_1, *,internal, X), "& " 292 (BC_1, *,internal, X), "& --BSR IO_50 50 " 293 (BC_1, *,internal, X), "& " 294 (BC_1, IO_50, output3, X, 295, 0, Z), "& " 295 (BC_1, *, control, 0), "& --BSR NC " 296 (BC_1, *,internal, X), "& " 297 (BC_1, *,internal, X), "& " 298 (BC_1, *,internal, X), "& --BSR IO_49 49 " 299 (BC_1, *,internal, X), "& " 300 (BC_1, IO_49, output3, X, 301, 0, Z), "& " 301 (BC_1, *, control, 0), "& --BSR IO_48 48 " 302 (BC_1, *,internal, X), "& " 303 (BC_1, IO_48, output3, X, 304, 0, Z), "& " 304 (BC_1, *, control, 0), "& --BSR NC " 305 (BC_1, *,internal, X), "& " 306 (BC_1, *,internal, X), "& " 307 (BC_1, *,internal, X), "& --BSR NC " 308 (BC_1, *,internal, X), "& " 309 (BC_1, *,internal, X), "& " 310 (BC_1, *,internal, X), "& --BSR IO_47 47 " 311 (BC_1, *,internal, X), "& " 312 (BC_1, IO_47, output3, X, 313, 0, Z), "& " 313 (BC_1, *, control, 0), "& --BSR NC " 314 (BC_1, *,internal, X), "& " 315 (BC_1, *,internal, X), "& " 316 (BC_1, *,internal, X), "& --BSR IO_46 46 " 317 (BC_1, *,internal, X), "& " 318 (BC_1, IO_46, output3, X, 319, 0, Z), "& " 319 (BC_1, *, control, 0), "& --BSR NC " 320 (BC_1, *,internal, X), "& " 321 (BC_1, *,internal, X), "& " 322 (BC_1, *,internal, X), "& --BSR HCLK 45 " 323 (BC_1, HCLK, input, X), "& --BSR IO_44 44 " 324 (BC_1, *,internal, X), "& " 325 (BC_1, IO_44, output3, X, 326, 0, Z), "& " 326 (BC_1, *, control, 0), "& --BSR NC " 327 (BC_1, *,internal, X), "& " 328 (BC_1, *,internal, X), "& " 329 (BC_1, *,internal, X), "& --BSR IO_40 40 " 330 (BC_1, *,internal, X), "& " 331 (BC_1, IO_40, output3, X, 332, 0, Z), "& " 332 (BC_1, *, control, 0), "& --BSR NC " 333 (BC_1, *,internal, X), "& " 334 (BC_1, *,internal, X), "& " 335 (BC_1, *,internal, X), "& --BSR NC " 336 (BC_1, *,internal, X), "& " 337 (BC_1, *,internal, X), "& " 338 (BC_1, *,internal, X), "& --BSR IO_39 39 " 339 (BC_1, *,internal, X), "& " 340 (BC_1, IO_39, output3, X, 341, 0, Z), "& " 341 (BC_1, *, control, 0), "& --BSR NC " 342 (BC_1, *,internal, X), "& " 343 (BC_1, *,internal, X), "& " 344 (BC_1, *,internal, X), "& --BSR IO_38 38 " 345 (BC_1, *,internal, X), "& " 346 (BC_1, IO_38, output3, X, 347, 0, Z), "& " 347 (BC_1, *, control, 0), "& --BSR NC " 348 (BC_1, *,internal, X), "& " 349 (BC_1, *,internal, X), "& " 350 (BC_1, *,internal, X), "& --BSR IO_37 37 " 351 (BC_1, *,internal, X), "& " 352 (BC_1, IO_37, output3, X, 353, 0, Z), "& " 353 (BC_1, *, control, 0), "& --BSR NC " 354 (BC_1, *,internal, X), "& " 355 (BC_1, *,internal, X), "& " 356 (BC_1, *,internal, X), "& --BSR NC " 357 (BC_1, *,internal, X), "& " 358 (BC_1, *,internal, X), "& " 359 (BC_1, *,internal, X), "& --BSR IO_36 36 " 360 (BC_1, *,internal, X), "& " 361 (BC_1, IO_36, output3, X, 362, 0, Z), "& " 362 (BC_1, *, control, 0), "& --BSR IO_35 35 " 363 (BC_1, *,internal, X), "& " 364 (BC_1, IO_35, output3, X, 365, 0, Z), "& " 365 (BC_1, *, control, 0), "& --BSR NC " 366 (BC_1, *,internal, X), "& " 367 (BC_1, *,internal, X), "& " 368 (BC_1, *,internal, X), "& --BSR NC " 369 (BC_1, *,internal, X), "& " 370 (BC_1, *,internal, X), "& " 371 (BC_1, *,internal, X), "& --BSR IO_34 34 " 372 (BC_1, *,internal, X), "& " 373 (BC_1, IO_34, output3, X, 374, 0, Z), "& " 374 (BC_1, *, control, 0), "& --BSR NC " 375 (BC_1, *,internal, X), "& " 376 (BC_1, *,internal, X), "& " 377 (BC_1, *,internal, X), "& --BSR IO_33 33 " 378 (BC_1, *,internal, X), "& " 379 (BC_1, IO_33, output3, X, 380, 0, Z), "& " 380 (BC_1, *, control, 0) "; end A54SX08lcc84;