Hosted by ELEKTRONIKPRAXIS and the PLC2 training center, the FPGA Kongress focuses on the advancement of FPGAs across manufacturers, and on user-friendly solutions that you can quickly integrate into your own developmental cycle.
High-Resolution Display & Camera Interfaces in cost-optimized FPGAs: Tuesday, June 12 at 11:15 AM
This presentation will explain the various camera and display interfaces that are used in embedded, industrial and consumer applications with cost-optimized FPGAs. Particular emphasis will be on resolutions higher than HD.
Microsemi’s built-in Debugging Features for Polarfire FPGAs: Wednesday, June 13 at 9:00 AM
PolarFire FPGAs come with unique debugging features taking advantage of built-in test structures in the silicon. This presentation by Arrow Electronics uses their Everest-Board to demonstrate how these SmartDebug features can be used.
Getting started with RISC-V in Microsemi FPGAs: Thursday, June 14 at 9:00 AM
Presented by Arrow Electronics, this session will provide an overview of the RISC-V ISA and its ecosystem, and demonstrate the workflow for building a simple hardware reference design.
Power optimized Deep Machine Learning using FPGAs: Thursday, June 14 at 9:00 AM
This presentation will explain the details of the multi-layer convolutional neural network IP for power-optimized FPGAs.
To learn more, please visit www.FPGAKongress.de.