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Embedded World 2018
Embedded World 2018 on 02.27.2018 - 03.01.2018  at Nuremberg Messe, Nuremberg, Gemany


Join us at Embedded World to meet our technical experts and understand how our solutions can benefit your application. Learn about our Mi-V Embedded Ecosystem, PolarFire FPGA family and our RISC-V embedded processor. Our experts will be on hand to discuss and demonstrate factory automation, industrial Ethernet switches, thermal and image processing, machine vision, motor control, portable test equipment and medical applications.

Stop by Microsemi's booth 1-431 to view the product demos.

Register for free direct admission to the exhibition here.

Sessions at the Microsemi Booth

Microsemi will be hosting five core sessions at booth 1-431 that you won’t want to miss. Come talk to the experts in the following areas:

Session 1: PolarFire FPGA Solutions -
During this presentation, users will be introduced to the PolarFire FPGA family, which just received the Electronic Products 2017 Product of the Year award. The device architecture details, schedule of devices/packages, available IPs and demo designs will be discussed. 

Session 2: Introduction and Update on RISC-V - Rick O’Connor from the RISC-V Foundation will present on the basics of RISC-V and the latest updates of the ISA and ecosystem. The benefits of the open instruction set architecture and the numerous RISC-V solutions available at Embedded World will be explained.   

Session 3: Mi-V RISC-V Ecosystem - Microsemi’s Mi-V RISC-V ecosystem components and roadmap will be presented during this talk. Experts will detail the available CPUs, example designs, boards, operating systems and more. Users will understand the benefits of using the Mi-V RISC-V ecosystem for their next design.

Session 4: Machine Learning/Artificial Intelligence - Hardus Richter from ASIC Design Services will explain the details of the multi-layer convolutional neural network CoreAI IP. Details will be shared on how the IP optimizes the FPGA fabric, DSP and memory resources for optimal performance per watt. Deep learning libraries such as Caffe or Lasagne can be extracted into the IP. Users will understand the wide breadth of applications which this machine learning IP could be targeted for.

Session 5: Walnut Digital Security - SecureRF will present the capabilities of its Walnut DSA security IP. Experts will explain how this IP allows one to securely boot a processor and verify digital signatures. In addition, firmware updates can be safely encrypted by leveraging crypto vector extensions of the soft RISC-V core in Microsemi FPGAs. All of these security demos run much faster than a hard processor could execute them because of the hardware acceleration of the IP.

Tuesday, February 27, 2018

Time Session Language
10:00 a.m.  PolarFire FPGA Solutions  English
11:00 a.m.  Walnut Digital Security  English
12:00 p.m.  PolarFire FPGA Solutions  German
1:00 p.m.  Machine Learning/Al  English
2:00 p.m.  Mi-V RISC-V Ecosystem  English
3:00 p.m.  PolarFire FPGA Solutions  English
4:00 p.m.  Introduction and Update on RISC-V  English
5:00 p.m.  Mi-V RISC-V Ecosystem  English
Wednesday, February 28, 2018
Time Session Language
10:00 a.m.  Introduction and Update on RISC-V  English
11:00 a.m.  PolarFire FPGA Solutions  German
12:00 p.m.  Mi-V RISC-V Ecosystem  English
1:00 p.m.  Machine Learning/Al  English
2:00 p.m.  PolarFire FPGA Solutions  English
3:00 p.m.  Introduction and Update on RISC-V  English
4:00 p.m.  Mi-V RISC-V Ecosystem  English
5:00 p.m.  Walnut Digital Security  English

Thursday, March 1, 2018

Time Session Language
10:00 a.m. PolarFire FPGA Solutions English
11:00 a.m. Machine Learning/Al English
12:00 p.m. Introduction and Update on RISC-V English
1:00 p.m. Mi-V RISC-V Ecosystem English
2:00 p.m. Walnut Digital Security English
3:00 p.m. PolarFire FPGA Solutions German
4:00 p.m. Mi-V RISC-V Ecosystem English

To RSVP for one of our booth sessions, please fill out the form below.