Come and Learn from Microsemi's SoC Experts at the 14th International SoC Conference www.socconference.com |
| The 14th International System-on-Chip (SoC) Conference & Networking Exhibit October 19 & 20, 2016 University of California, Irvine (UCI) - Calit2 www.SoCconference.com |
| Jim Aralis, Chief Technology Officer (CTO), and Vice President of R&D. "Down the Technology Curve? Not so Fast," Abstract: The talk will focus on changes in technology, applications, and economics of the SoC ecosystem, and what it will likely mean for the realization of these devices in the next decade. It will examine the way process technology, packaging technology, design abstraction, and other such factors of true differentiation will push these core devices. These observations are intended to provide insights into where to position your company and career for the coming decade |
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| Dr. Rino Micheloni, Engineering Fellow at Microsemi Corporation. "Impact of 3D Flash Memories on SSD's Controller Design." Abstract: Flash memory has been a disruptive technology from its inception in the early '90s and innovation is still ongoing after more than 25 years. Thanks to their storage density, NAND Flash memories have changed our lives: USB keys have replaced floppy-disks and Flash Cards (SD, eMMC) record our pictures and movies instead of analog films. |
| In the last 4-5 years Solid State Drives (SSDs) have emerged as the new killer applications for Flash: first in the consumer space (smartphones and tablets) but now expanding to enterprise applications as well. Indeed, being extremely demanding in terms of storage capacity, SSDs fueled a new revolutionary wave of innovations: 3D Flash memories. Today “3D” is a common buzzword but in this specific case it means that multiple layers (up to 64, as we speak) of memory cells are manufactured within the same piece of silicon. In this paper we review the evolutionary path from planar to 3-dimensional NAND Flash memories, and its impact on the design of the Flash Controller located inside a Solid State Drive, with specific reference to enterprise applications, which are the most demanding in terms of performances and reliability. |
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| Dr. Richard RAO, Microsemi Technical Fellow and a senior member of IEEE. "CMOS Backend Integration Reliability Challenges and Solutions." Abstract: The backend integration of advanced CMOS process induces new reliability failure modes due to the adoption of new materials used for interconnects like extreme low k (ELK) dielectric, Pb free solder and Cu pillar bumping and the advanced packaging technologies such as high performance flip chip BGA and 2.5D/3D packages. Failures are primarily either inside the Si die with the typical failure modes such as ELK fracture; crack initiation and propagation at the Cu/ELK interface or the bump interconnect fracture, etc. |
| The reliability failure mechanisms are very complex and many factors may contribute to the failures. In this talk, the following major issues will be reviewed: Major failure modes - Si backend interconnect cracking; bump cracking due to thermal fatigue; Die and underfill cracking and delamination, etc. Chip to Package Interaction (CPI) landscape - Discuss major factors that contribute to CPI failure such as design layout, fabrication, wafer singulation, package design, assembly process and material properties, etc. Stress factors - Backend integration; assembly induced stresses and end user use conditions such as thermal cycling, power cycling, moisture loading, vibration and shock/drop.Packaging technology effects - Cu wirebonding, flip chip BGA, 2.5D/3D TSV, etc. Electrical CPI - failure modes and modeling Design for backend reliability solutions - general approach and comprehensive DfR modeling Backend Reliability measurement - test structures and reliability qualification testing. |
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| Ted Marena, Director FPGA SOC Marketing, Microsemi. "Microsemi highly-integrated and lowest power FPGAs enable unique camera applications" Abstract: Because Microsemi FPGAs offer more resources in lower density FPGAs at up to 50% less power, engineers are able to create numerous unique camera designs. This presentation will discuss various image sensor interfaces and explain how Microsemi can support these. Typical image processing functions that can be implemented, designs which benefit by using Microsemi FPGAs and block diagram details of unique camera based products will be shown. |
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| When: | Wednesday, October 19, at 4:30 PM |
| Panel: | "Memory Trends and Innovations From Big Data to Mobile and Wearable Devices." |
| Moderator: | Farhad Mafie, SoC Conference Chairman. |
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| For more information, visit: http://www.socconference.com | |