Initial phase and frequency errors an have a big impact on holdover performance. The CSAC’s unique 1PPS input can be utilized to eliminate these errors by employing proper disciplining. Read more »

Here we explain how time error can be calculated from published aging rates. Given the CSACs small size and power consumption, the calculated holdover performance is impressive. Read more »

The chip-scale atomic clock (CSAC) is the world’s lowest-power, lowest-profile atomic clock. Thousands of units are deployed every year. But how does it perform in a rapidly changing thermal environment? Read more »