Microsemi published Version 5 of the RTG4 Datasheet in August 2018 with the following updates:
o Information about RTG4 device status was updated.Read more »
We are rounding up our Clock Jitter series by taking a look at what external factors can induce jitter in oscillators, and how they can be effectively compensated for.Read more »
Continuous advances in high-speed communication and measurement systems require higher levels of performance from system clocks and references.Read more »
As previously demonstrated, timing noise/jitter is a very complicated phenomenon, and in order to understand how jitter can impact a system it needs to be measured and quantified. Read more »
What Is Jitter?
Jitter as defined by NIST as the “short term phase variation of the significant instants of a digital signal from their ideal positions in time”. Read more »
Quick Answer: It depends.Read more »
In addition to this blog we keep a selection of longer form articles and whitepapers on our website. Read more »
In a previous post we described Power Supply Rejection Ratio (PSRR) and discussed the ways it can impact an oscillators performance. In this update one of the ways we approach measuring PSRR on our devices.Read more »
What is PSRR?
Power Supply Rejection Ratio or Power Supply Ripple Rejection (PSRR) is a measure of how well a circuit rejects noise, of various frequencies, injected at its voltage input. The ripple can be induced from a number of sources, such as a 50Hz/60Hz supply ripple, a switching ripple from a DC/DC converter, or a ripple due to the sharing of an input supply between different circuit blocks on the board. In the timing solutions world, when discussing PSRR we are typically referring to supply ripple.
A common VCXO specification is the Vc input impedance. A typical value might be 100KOhm or 10MegOhm. What does this actually mean?
There is a lot of information available on the internet for engineers who want to learn more about frequency control, synchronization and clocks in general.
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