The SA.45s Chip Scale Atomic Clock (CSAC): Low Power, Low Profile Height, & Stability (Part 2 of 3)

In the first of this series of articles on chip scale atomic clocks, I shared about an atomic clock, what it is and how they are more accurate than Quartz clocks. Read Thermally-Improved Microsemi Chip Scale Atomic Clock (CSAC) (Part 1 of 3).

Now, I’d like to introduce you to the thermally-improved Microsemi chip scale atomic clock (CSAC) itself, including the health of a CSAC, aging rate, and temperature performance.

The Microsemi SA.45s Chip Scale Atomic Clock (CSAC) (see Figure 1) was developed for applications requiring low power, low profile height, and atomic clock stability. In 2016, the product was re-launched with a wider operating temperature (–10 °C to 70 °C ) to meet a broader range of applications. Since the re-launch, as part of the continuous improvement and monitoring of CSAC quality, a sample of production units were periodically sequestered to observe their long-term reliability and performance. This white paper will discuss the performance and how the temperature range was extended.

Prior to 2016, the CSAC was limited to an operating temperature of –10 °C to 35 °C . Operation outside this range was found to degrade the vacuum integrity within the physics package. When the vacuum fails, excess heater power will burden the electronics and the performance is severely degraded.

A joint investigation by a cross-functional team to improve the manufacturing process of CSAC was assembled with an end goal of producing a product that would reliably operate over a wider temperature range, while still meeting the key specifications. The investigation concluded the following:

● Additional manufacturing controls to ensure purity of the physics package are necessary
● Due to the small size and complex construction of the physics package, any contamination will affect the reliability of the product

These conclusions necessitated several proprietary modifications to our manufacturing process. To verify that each CSAC is free of contamination, additional screening measures have been put in place to ensure every CSAC is compliant with the recommendations of the R&D team.

Note: A CSAC should never be exposed to temperatures outside of the specified operating and storagetemperatures. Failure to do so will void the warranty. The above test was performed on the physics package only. CSAC electronics are not rated to withstand the above temperature profile and thus were not included in the test.

To compare the changes to the manufacturing process, an extreme high temperature test was performed on CSAC physics packages: high temperature-soak while the power consumption was monitored. The old process (pink sample curve) typically failed after 20 cycles of this extreme test, as evidenced by the rapid rise in power consumption. However, the new process (green sample curve) was able to maintain normal power consumption beyond 40 test cycles—a dramatic improvement. The next
section will further discuss power consumption as it relates to vacuum integrity. View a comparison of the old CSAC process and the new CSAC process featuring a prebake.

Heater Power

Heater power is a good indication of CSAC health. It directly relates to the vacuum integrity of each clock. If compromised, the heater power may suddenly jump in value or rapidly increase >1 mW over a one month period. A loss of vacuum will ultimately result in a catastrophic failure: inability to achieve atomic lock. If this failure should occur, the output drift rate will behave similar to an inexpensive TCXO and be much more sensitive to environmental perturbations.

Microsemi has spent many years improving the manufacturing process and below we show the payoff of this investment as evidenced by the heater power trends for two CSACs over many months. Both show an acceptable rise of ~1 mW over a 10-month period. These are stable units and are not in danger of losing vacuum.

The slight rise in heater power is considered normal behavior and not a cause for alarm. However, as additional precaution we advise users to monitor the heater power drift and flag units that rapidly rise >1 mW/month. Upon delivery, absolute heater power should reside <20 mW at room temperature conditions. Aging Rate

Unlike a high performance Cesium Standard such as the Microsemi 5071A, secondary clocks such as CSAC have inherent frequency drift when observed over a long duration. This drift is termed “aging rate” and quantified as the change in frequency per month. In the following graph, we show two units toward the extremes of the CSAC performance spectrum. Most units typically lie between the red and blue curves.

The red curve demonstrated drift of 6 × 10 /month, within the current specifications but –10 unexceptional. However, with an aging rate of 2 × 10 /month, the blue curve is remarkable. Its drift –11 performance approaches our highest performance Rubidium oscillator, the XPRO, but with 120x less power (120 mW)!

Occasionally, CSACs with relatively poor drift (such as the following one) will improve over the course of their lifetime. In the case of Sample #3, it had an unacceptable aging rate and was screened out of our production test accordingly. However, in the most recent 5 months, it improved to ~1× 10 /month –10 aging rate.

Most units in our long-term test program have aging rates well below our published specifications. For a complete list of the CSACs in our long-term aging test, please see the Table of Samples.

Temperature Performance

The improvements in vacuum reliability have enabled the CSAC to operate over a wider temperature range: –10 °C to 70 °C. Performance over temperature is important for mobile applications and can give an indication of time error (or “holdover”) in a temperature-exposed environment. As shown in the following graph, performance below 40 °C is quite good on these sample units. The main difference between these CSACs occurs at warmer temperatures, indicated by the bump in the red curve where the temperature is raised in the middle of the plot. Note that temperature (gray trace) on this page is plotted versus the right-hand y-axis.

The graph on page 5 shows that corresponding time error over this temperature profile is 5.1 µs and –1.3 µs, respectively.

In the third and final article in this series, I’ll share products that have leveraged CSAC’s key attributes and the conclusion.

Please allow me to answer any questions you may have on chip scale atomic clocks; connect with me on LinkedIn.

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