ZL30152
Universal Clock Translator
Overview
The ZL30152 Universal Clock Translator, part of Microsemi's ClockCenter platform of Synchronous Clock devices, delivers industry leading synchronization performance for high-speed complex applications. The highly integrated and programmable solution provides translation from any input reference frequency to any output clock frequency with jitter performance that can directly drive 10 G PHY devices.
The ZL30152 accepts 2 single ended or differential input references and generates 6 high performance programmable clock outputs. The highly integrated solution allows designers to replace multiple components with a single chip, simplifying design and reducing component count and power.

Applications/Uses
- Clock Generation for Physical Line Interface:
- SONET/SDH, OC-192/OC-48
- SONET/SDH with FEC
- 10G Base X, R and W
- 100 BaseX, GE, Fibre channel
- Clock Generation and Distribution for back plane Interface:
- TDM, Telecom Bus, Utopia, SBI
- Rapid-IO, PCI-Express, serial MII, Star Fabric, XAUI
Key Features
- Programmable synthesizers generate any clock-rate from 1 kHz to 720 MHz
- Precision synthesizers generate clocks with jitter below 0.7 ps RMS for 10 G PHYs
- Two general purpose synthesizers generate a wide range of digital bus clocks
- Programmable digital PLL synchronize to any clock rate from 1 kHz to 720 MHz
- Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FEC rates
- Digital PLL filter jitter from 14 Hz, 28 Hz, 56 Hz, 112 Hz, 224 Hz, 448 Hz or 896 Hz
- Automatic hitless reference switching and digital holdover on reference fail
- Two reference inputs configurable as single ended or differential
- Four LVPECL outputs and two LVCMOS outputs
- Eight outputs configurable as LVCMOS or LVDS/LVPECL/HCSL
- Operates from a single crystal resonator or clock oscillator
- Configurable via SPI/I2C interface
Docs & Specs
| Datasheet | ZL30152 Short Form Data Sheet ZL30152 Full Datasheet |
|---|---|
| Application Notes |
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