IP DirectCores
Overview
DirectCores Are Developed By Microsemi And Optimized For Our Devices
DirectCores are designed, verified, supported and maintained by Microsemi for use on Microsemi devices. These proven cores come complete as pre-implemented, synthesizable building blocks and have been thoroughly verified in Microsemi FPGAs. Microsemi IP is delivered with full documentation and support to help simplify the designer's task of achieving fast time-to-market while minimizing design cost and risk.
The Libero Catalog and SmartDesign manage the configuration of Microsemi IP cores for embedded applications, while the Firmware Catalog manages firmware drivers. |
IP Licensing and Ordering --------------------------------- Search/Browse All IP Cores --------------------------------- Search/Browse all DirectCores --------------------------------- Search/Browse all CompanionCores |
Below is a list of free Microsemi IP cores for use in the Libero SmartDesign IP graphical design tool. Libero Evaluation, Silver, Gold, Platinum and Standalone Licensing includes a bundle of Microsemi IP cores, as shown in the table below. These IP are available with Libero SoC PolarFire, Libero SoC Design Software and Libero IDE, where they are supported for the selected family. See individual IP pages or Handbooks for supported family information.
Note: Libero license options are changing as indicated in Customer Notification CN17012. These changes will take effect with Libero SoC v11.8 due for release beginning of March, 2017
Microsemi DirectCore IP Available for Purchase for Use with Libero | |||
---|---|---|---|
Product Number | Obfuscated RTL Available for Purchase | RTL Source Available for Purchase | |
Core1553BRM* | Obfuscated RTL | RTL source | |
Core1553BRT, Core1553BRT_APB* | Obfuscated RTL | RTL source | |
CoreFFT* | Not Available | RTL Source | |
Core429*, Core429_APB* | Obfuscated RTL | RTL source | |
CorePCIF, CorePCIF_AHB |
Obfuscated RTL | RTL source | |
CoreTSE_AHB , CoreTSE | Obfuscated RTL | Not Available | |
CoreSGMII | Obfuscated RTL | Not Available | |
CoreCIC* | Not Available | RTL Source | |
Core10GMAC | Obfuscated RTL | Not Available |
*Not Supported on Linux Platform
Microsemi DirectCore IP Included in Libero IP Bundles (Available for free) | |||
---|---|---|---|
IP Core Name |
Evaluation and Silver |
Libero Gold, Platinum and Standalone | |
CoreJESD204BRX | Not Supported | RTL source | |
CoreJESD204BTX | Not Supported | RTL source | |
CoreRSDEC | Not Supported | RTL source generator | |
CoreRSENC |
Not Supported | RTL source generator | |
CoreRGMII | Obfuscated | RTL source | |
CoreQDR | Obfuscated | RTL source generator | |
Core10/100 | RTL source | ||
Core10/100_AHBAPB | RTL source | ||
Core1588 | RTL source | ||
Core16550 | RTL source | ||
Core3DES | RTL source | ||
Core8051s | RTL source | ||
CoreABC | RTL source | ||
CoreAES128 | RTL source | ||
CoreAHB | RTL source | ||
CoreAHB2APB | RTL source | ||
CoreAHBLite | RTL source | ||
CoreAHBLSRAM | RTL source | ||
CoreAHBLtoAXI | RTL source | ||
CoreAhbNvm | RTL source | ||
CoreAhbSram | RTL source | ||
CoreAHBtoAPB3 | RTL source | ||
CoreAI | RTL source | ||
CoreAPB | RTL source | ||
CoreAPB3 | RTL source | ||
CoreAPBLSRAM | RTL source | ||
CoreApbNvm | RTL source | ||
CoreAPBSRAM | RTL source | ||
CoreAXI | RTL source | ||
CoreAXItoAHBL | RTL source | ||
CoreCFI | RTL source | ||
CoreConfigMaster | RTL source | ||
CoreConfigP | RTL source | ||
CoreCORDIC | RTL source generator | ||
CoreDES | RTL source | ||
CoreDDR | RTL source | ||
CoreEDAC | RTL source generator | ||
CoreFIFO | RTL source generator | ||
CoreFIR | RTL source generator | ||
CoreFMEE | RTL source | ||
CoreFROM | RTL source | ||
CoreGPIO | RTL source | ||
CoreHPDMACtrl | RTL source |
||
CoreI2C | RTL source | ||
CoreInterrupt | RTL source | ||
CoreLPC | RTL source | ||
CoreMACFilter | RTL source | ||
CoreMBX | RTL source | ||
CoreMDIO_APB | RTL source | ||
CoreMemCtrl | RTL source | ||
CoreMMC | RTL source | ||
CorePCS | RTL source | ||
CorePWM | RTL source | ||
CoreQDR | RTL source generator | ||
CoreQEI | RTL source generator | ||
CoreRemap | RTL source | ||
CoreResetP | RTL source | ||
CoreRMII | RTL source | ||
CoreSDLC | RTL source | ||
CoreSDR | RTL source | ||
CoreSDR_AHB | RTL source | ||
CoreSDR_AXI | RTL source | ||
CoreSF2Config | RTL source | ||
CoreSF2Reset | RTL source | ||
CoreSMIP | Obfuscated | ||
CoreSPI | RTL source | ||
CoreSysServices | RTL source | ||
CoreTBItoEPCS | RTL source | ||
CoreTimer | RTL source | ||
CoreUART | RTL source | ||
CoreUART_APB | RTL source | ||
CoreWatchdog | RTL source | ||
Cortex-M1 |
Pre-placed design block |
User's Guides and Manuals
Installing IP Cores and Drivers User's Guide | 311 KB | 8/2010 |
Register Your Design
If you are using either a DirectCore or a CompanionCore in your design, don't forget to Register Your Design so you can stay up to date on any enhancements, changes or new device support for your core by visiting the Registration Page. (Note: the Registration Page link is also accessible from the IP Search results).
Access to Firmware Drivers
Many DirectCores feature hardware drivers accessible through the Firmware Catalog Tool. The Firmware Catalog streamlines locating and generating firmware drivers that are compatible with Intellectual Property (IP) cores used in Microsemi FPGA designs. For the SmartFusion2 design flow, the designer does not need to determine which firmware must be selected and generated. SmartDesign searches the design for instantiated IP and automatically presents the appropriate firmware.Visit the Firmware Catalog web page to see how this tool simplifies the use of IP Cores in embedded processor designs.
Parametric Search
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