`timescale 1 ns/100 ps
// Version: 


module SERDESIF_0(
       APB_PRDATA,
       APB_PREADY,
       APB_PSLVERR,
       ATXCLKSTABLE,
       EPCS_READY,
       EPCS_RXCLK,
       EPCS_RXCLK_0,
       EPCS_RXCLK_1,
       EPCS_RXDATA,
       EPCS_RXIDLE,
       EPCS_RXRSTN,
       EPCS_RXVAL,
       EPCS_TXCLK,
       EPCS_TXCLK_0,
       EPCS_TXCLK_1,
       EPCS_TXRSTN,
       FATC_RESET_N,
       H2FCALIB0,
       H2FCALIB1,
       M_ARADDR,
       M_ARBURST,
       M_ARID,
       M_ARLEN,
       M_ARSIZE,
       M_ARVALID,
       M_AWADDR_HADDR,
       M_AWBURST_HTRANS,
       M_AWID,
       M_AWLEN_HBURST,
       M_AWSIZE_HSIZE,
       M_AWVALID_HWRITE,
       M_BREADY,
       M_RREADY,
       M_WDATA_HWDATA,
       M_WID,
       M_WLAST,
       M_WSTRB,
       M_WVALID,
       PCIE_SYSTEM_INT,
       PLL_LOCK_INT,
       PLL_LOCKLOST_INT,
       S_ARREADY,
       S_AWREADY,
       S_BID,
       S_BRESP_HRESP,
       S_BVALID,
       S_RDATA_HRDATA,
       S_RID,
       S_RLAST,
       S_RRESP,
       S_RVALID,
       S_WREADY_HREADYOUT,
       SPLL_LOCK,
       WAKE_N,
       XAUI_OUT_CLK,
       APB_CLK,
       APB_PADDR,
       APB_PENABLE,
       APB_PSEL,
       APB_PWDATA,
       APB_PWRITE,
       APB_RSTN,
       CLK_BASE,
       EPCS_PWRDN,
       EPCS_RSTN,
       EPCS_RXERR,
       EPCS_TXDATA,
       EPCS_TXOOB,
       EPCS_TXVAL,
       F2HCALIB0,
       F2HCALIB1,
       FAB_PLL_LOCK,
       FAB_REF_CLK,
       M_ARREADY,
       M_AWREADY,
       M_BID,
       M_BRESP_HRESP,
       M_BVALID,
       M_RDATA_HRDATA,
       M_RID,
       M_RLAST,
       M_RRESP,
       M_RVALID,
       M_WREADY_HREADY,
       PCIE_INTERRUPT,
       PERST_N,
       S_ARADDR,
       S_ARBURST,
       S_ARID,
       S_ARLEN,
       S_ARLOCK,
       S_ARSIZE,
       S_ARVALID,
       S_AWADDR_HADDR,
       S_AWBURST_HTRANS,
       S_AWID_HSEL,
       S_AWLEN_HBURST,
       S_AWLOCK,
       S_AWSIZE_HSIZE,
       S_AWVALID_HWRITE,
       S_BREADY_HREADY,
       S_RREADY,
       S_WDATA_HWDATA,
       S_WID,
       S_WLAST,
       S_WSTRB,
       S_WVALID,
       SERDESIF_CORE_RESET_N,
       SERDESIF_PHY_RESET_N,
       WAKE_REQ,
       XAUI_FB_CLK,
       RXD3_P,
       RXD2_P,
       RXD1_P,
       RXD0_P,
       RXD3_N,
       RXD2_N,
       RXD1_N,
       RXD0_N,
       TXD3_P,
       TXD2_P,
       TXD1_P,
       TXD0_P,
       TXD3_N,
       TXD2_N,
       TXD1_N,
       TXD0_N,
       REFCLK0,
       REFCLK1
    )
/* synthesis black_box

pragma attribute SERDESIF_0 ment_tsu0 APB_PADDR[10]->APB_CLK+0.155
pragma attribute SERDESIF_0 ment_tsu1 APB_PADDR[11]->APB_CLK+-0.055
pragma attribute SERDESIF_0 ment_tsu2 APB_PADDR[12]->APB_CLK+1.455
pragma attribute SERDESIF_0 ment_tsu3 APB_PADDR[13]->APB_CLK+1.475
pragma attribute SERDESIF_0 ment_tsu4 APB_PADDR[2]->APB_CLK+4.113
pragma attribute SERDESIF_0 ment_tsu5 APB_PADDR[3]->APB_CLK+4.753
pragma attribute SERDESIF_0 ment_tsu6 APB_PADDR[4]->APB_CLK+5.618
pragma attribute SERDESIF_0 ment_tsu7 APB_PADDR[5]->APB_CLK+3.773
pragma attribute SERDESIF_0 ment_tsu8 APB_PADDR[6]->APB_CLK+4.464
pragma attribute SERDESIF_0 ment_tsu9 APB_PADDR[7]->APB_CLK+4.529
pragma attribute SERDESIF_0 ment_tsu10 APB_PADDR[8]->APB_CLK+4.604
pragma attribute SERDESIF_0 ment_tsu11 APB_PADDR[9]->APB_CLK+4.181
pragma attribute SERDESIF_0 ment_tsu12 APB_PENABLE->APB_CLK+0.646
pragma attribute SERDESIF_0 ment_tsu13 APB_PSEL->APB_CLK+1.513
pragma attribute SERDESIF_0 ment_tsu14 APB_PWDATA[0]->APB_CLK+2.265
pragma attribute SERDESIF_0 ment_tsu15 APB_PWDATA[10]->APB_CLK+-0.086
pragma attribute SERDESIF_0 ment_tsu16 APB_PWDATA[11]->APB_CLK+-0.108
pragma attribute SERDESIF_0 ment_tsu17 APB_PWDATA[12]->APB_CLK+-0.040
pragma attribute SERDESIF_0 ment_tsu18 APB_PWDATA[13]->APB_CLK+-0.069
pragma attribute SERDESIF_0 ment_tsu19 APB_PWDATA[14]->APB_CLK+-0.061
pragma attribute SERDESIF_0 ment_tsu20 APB_PWDATA[15]->APB_CLK+-0.196
pragma attribute SERDESIF_0 ment_tsu21 APB_PWDATA[16]->APB_CLK+0.022
pragma attribute SERDESIF_0 ment_tsu22 APB_PWDATA[17]->APB_CLK+-0.015
pragma attribute SERDESIF_0 ment_tsu23 APB_PWDATA[18]->APB_CLK+-0.009
pragma attribute SERDESIF_0 ment_tsu24 APB_PWDATA[19]->APB_CLK+-0.022
pragma attribute SERDESIF_0 ment_tsu25 APB_PWDATA[1]->APB_CLK+1.320
pragma attribute SERDESIF_0 ment_tsu26 APB_PWDATA[20]->APB_CLK+0.018
pragma attribute SERDESIF_0 ment_tsu27 APB_PWDATA[21]->APB_CLK+-0.018
pragma attribute SERDESIF_0 ment_tsu28 APB_PWDATA[22]->APB_CLK+-0.038
pragma attribute SERDESIF_0 ment_tsu29 APB_PWDATA[23]->APB_CLK+-0.063
pragma attribute SERDESIF_0 ment_tsu30 APB_PWDATA[24]->APB_CLK+-0.006
pragma attribute SERDESIF_0 ment_tsu31 APB_PWDATA[25]->APB_CLK+-0.094
pragma attribute SERDESIF_0 ment_tsu32 APB_PWDATA[26]->APB_CLK+-0.186
pragma attribute SERDESIF_0 ment_tsu33 APB_PWDATA[27]->APB_CLK+-0.174
pragma attribute SERDESIF_0 ment_tsu34 APB_PWDATA[28]->APB_CLK+-0.064
pragma attribute SERDESIF_0 ment_tsu35 APB_PWDATA[29]->APB_CLK+0.009
pragma attribute SERDESIF_0 ment_tsu36 APB_PWDATA[2]->APB_CLK+2.516
pragma attribute SERDESIF_0 ment_tsu37 APB_PWDATA[30]->APB_CLK+-0.010
pragma attribute SERDESIF_0 ment_tsu38 APB_PWDATA[31]->APB_CLK+-0.111
pragma attribute SERDESIF_0 ment_tsu39 APB_PWDATA[3]->APB_CLK+2.313
pragma attribute SERDESIF_0 ment_tsu40 APB_PWDATA[4]->APB_CLK+1.799
pragma attribute SERDESIF_0 ment_tsu41 APB_PWDATA[5]->APB_CLK+1.651
pragma attribute SERDESIF_0 ment_tsu42 APB_PWDATA[6]->APB_CLK+1.478
pragma attribute SERDESIF_0 ment_tsu43 APB_PWDATA[7]->APB_CLK+1.575
pragma attribute SERDESIF_0 ment_tsu44 APB_PWDATA[8]->APB_CLK+-0.091
pragma attribute SERDESIF_0 ment_tsu45 APB_PWDATA[9]->APB_CLK+-0.134
pragma attribute SERDESIF_0 ment_tsu46 APB_PWRITE->APB_CLK+1.552
pragma attribute SERDESIF_0 ment_tsu47 APB_RSTN->APB_CLK+2.639
pragma attribute SERDESIF_0 ment_tsu48 M_BRESP_HRESP[0]->CLK_BASE+-0.106
pragma attribute SERDESIF_0 ment_tsu49 M_RDATA_HRDATA[0]->CLK_BASE+-0.268
pragma attribute SERDESIF_0 ment_tsu50 M_RDATA_HRDATA[10]->CLK_BASE+-0.226
pragma attribute SERDESIF_0 ment_tsu51 M_RDATA_HRDATA[11]->CLK_BASE+-0.220
pragma attribute SERDESIF_0 ment_tsu52 M_RDATA_HRDATA[12]->CLK_BASE+-0.265
pragma attribute SERDESIF_0 ment_tsu53 M_RDATA_HRDATA[13]->CLK_BASE+-0.261
pragma attribute SERDESIF_0 ment_tsu54 M_RDATA_HRDATA[14]->CLK_BASE+-0.248
pragma attribute SERDESIF_0 ment_tsu55 M_RDATA_HRDATA[15]->CLK_BASE+-0.192
pragma attribute SERDESIF_0 ment_tsu56 M_RDATA_HRDATA[16]->CLK_BASE+-0.165
pragma attribute SERDESIF_0 ment_tsu57 M_RDATA_HRDATA[17]->CLK_BASE+-0.285
pragma attribute SERDESIF_0 ment_tsu58 M_RDATA_HRDATA[18]->CLK_BASE+-0.180
pragma attribute SERDESIF_0 ment_tsu59 M_RDATA_HRDATA[19]->CLK_BASE+-0.300
pragma attribute SERDESIF_0 ment_tsu60 M_RDATA_HRDATA[1]->CLK_BASE+-0.261
pragma attribute SERDESIF_0 ment_tsu61 M_RDATA_HRDATA[20]->CLK_BASE+-0.296
pragma attribute SERDESIF_0 ment_tsu62 M_RDATA_HRDATA[21]->CLK_BASE+-0.261
pragma attribute SERDESIF_0 ment_tsu63 M_RDATA_HRDATA[22]->CLK_BASE+-0.170
pragma attribute SERDESIF_0 ment_tsu64 M_RDATA_HRDATA[23]->CLK_BASE+-0.283
pragma attribute SERDESIF_0 ment_tsu65 M_RDATA_HRDATA[24]->CLK_BASE+-0.274
pragma attribute SERDESIF_0 ment_tsu66 M_RDATA_HRDATA[25]->CLK_BASE+-0.160
pragma attribute SERDESIF_0 ment_tsu67 M_RDATA_HRDATA[26]->CLK_BASE+-0.287
pragma attribute SERDESIF_0 ment_tsu68 M_RDATA_HRDATA[27]->CLK_BASE+-0.195
pragma attribute SERDESIF_0 ment_tsu69 M_RDATA_HRDATA[28]->CLK_BASE+-0.282
pragma attribute SERDESIF_0 ment_tsu70 M_RDATA_HRDATA[29]->CLK_BASE+-0.231
pragma attribute SERDESIF_0 ment_tsu71 M_RDATA_HRDATA[2]->CLK_BASE+-0.278
pragma attribute SERDESIF_0 ment_tsu72 M_RDATA_HRDATA[30]->CLK_BASE+-0.236
pragma attribute SERDESIF_0 ment_tsu73 M_RDATA_HRDATA[31]->CLK_BASE+-0.261
pragma attribute SERDESIF_0 ment_tsu74 M_RDATA_HRDATA[3]->CLK_BASE+-0.230
pragma attribute SERDESIF_0 ment_tsu75 M_RDATA_HRDATA[4]->CLK_BASE+-0.257
pragma attribute SERDESIF_0 ment_tsu76 M_RDATA_HRDATA[5]->CLK_BASE+-0.284
pragma attribute SERDESIF_0 ment_tsu77 M_RDATA_HRDATA[6]->CLK_BASE+-0.292
pragma attribute SERDESIF_0 ment_tsu78 M_RDATA_HRDATA[7]->CLK_BASE+-0.281
pragma attribute SERDESIF_0 ment_tsu79 M_RDATA_HRDATA[8]->CLK_BASE+-0.256
pragma attribute SERDESIF_0 ment_tsu80 M_RDATA_HRDATA[9]->CLK_BASE+-0.296
pragma attribute SERDESIF_0 ment_tsu81 M_WREADY_HREADY->CLK_BASE+0.183
pragma attribute SERDESIF_0 ment_tsu82 S_AWADDR_HADDR[0]->CLK_BASE+0.509
pragma attribute SERDESIF_0 ment_tsu83 S_AWADDR_HADDR[10]->CLK_BASE+-0.346
pragma attribute SERDESIF_0 ment_tsu84 S_AWADDR_HADDR[11]->CLK_BASE+-0.346
pragma attribute SERDESIF_0 ment_tsu85 S_AWADDR_HADDR[12]->CLK_BASE+-0.347
pragma attribute SERDESIF_0 ment_tsu86 S_AWADDR_HADDR[13]->CLK_BASE+-0.350
pragma attribute SERDESIF_0 ment_tsu87 S_AWADDR_HADDR[14]->CLK_BASE+-0.359
pragma attribute SERDESIF_0 ment_tsu88 S_AWADDR_HADDR[15]->CLK_BASE+-0.363
pragma attribute SERDESIF_0 ment_tsu89 S_AWADDR_HADDR[16]->CLK_BASE+-0.348
pragma attribute SERDESIF_0 ment_tsu90 S_AWADDR_HADDR[17]->CLK_BASE+-0.352
pragma attribute SERDESIF_0 ment_tsu91 S_AWADDR_HADDR[18]->CLK_BASE+-0.309
pragma attribute SERDESIF_0 ment_tsu92 S_AWADDR_HADDR[19]->CLK_BASE+-0.249
pragma attribute SERDESIF_0 ment_tsu93 S_AWADDR_HADDR[1]->CLK_BASE+0.513
pragma attribute SERDESIF_0 ment_tsu94 S_AWADDR_HADDR[20]->CLK_BASE+-0.269
pragma attribute SERDESIF_0 ment_tsu95 S_AWADDR_HADDR[21]->CLK_BASE+-0.268
pragma attribute SERDESIF_0 ment_tsu96 S_AWADDR_HADDR[22]->CLK_BASE+-0.230
pragma attribute SERDESIF_0 ment_tsu97 S_AWADDR_HADDR[23]->CLK_BASE+-0.282
pragma attribute SERDESIF_0 ment_tsu98 S_AWADDR_HADDR[24]->CLK_BASE+-0.277
pragma attribute SERDESIF_0 ment_tsu99 S_AWADDR_HADDR[25]->CLK_BASE+-0.266
pragma attribute SERDESIF_0 ment_tsu100 S_AWADDR_HADDR[26]->CLK_BASE+-0.307
pragma attribute SERDESIF_0 ment_tsu101 S_AWADDR_HADDR[27]->CLK_BASE+-0.308
pragma attribute SERDESIF_0 ment_tsu102 S_AWADDR_HADDR[28]->CLK_BASE+-0.261
pragma attribute SERDESIF_0 ment_tsu103 S_AWADDR_HADDR[29]->CLK_BASE+-0.281
pragma attribute SERDESIF_0 ment_tsu104 S_AWADDR_HADDR[2]->CLK_BASE+0.452
pragma attribute SERDESIF_0 ment_tsu105 S_AWADDR_HADDR[30]->CLK_BASE+-0.317
pragma attribute SERDESIF_0 ment_tsu106 S_AWADDR_HADDR[31]->CLK_BASE+-0.330
pragma attribute SERDESIF_0 ment_tsu107 S_AWADDR_HADDR[3]->CLK_BASE+-0.245
pragma attribute SERDESIF_0 ment_tsu108 S_AWADDR_HADDR[4]->CLK_BASE+-0.359
pragma attribute SERDESIF_0 ment_tsu109 S_AWADDR_HADDR[5]->CLK_BASE+-0.358
pragma attribute SERDESIF_0 ment_tsu110 S_AWADDR_HADDR[6]->CLK_BASE+-0.373
pragma attribute SERDESIF_0 ment_tsu111 S_AWADDR_HADDR[7]->CLK_BASE+-0.367
pragma attribute SERDESIF_0 ment_tsu112 S_AWADDR_HADDR[8]->CLK_BASE+-0.354
pragma attribute SERDESIF_0 ment_tsu113 S_AWADDR_HADDR[9]->CLK_BASE+-0.287
pragma attribute SERDESIF_0 ment_tsu114 S_AWBURST_HTRANS[0]->CLK_BASE+0.685
pragma attribute SERDESIF_0 ment_tsu115 S_AWBURST_HTRANS[1]->CLK_BASE+0.731
pragma attribute SERDESIF_0 ment_tsu116 S_AWID_HSEL[0]->CLK_BASE+0.555
pragma attribute SERDESIF_0 ment_tsu117 S_AWSIZE_HSIZE[0]->CLK_BASE+0.311
pragma attribute SERDESIF_0 ment_tsu118 S_AWSIZE_HSIZE[1]->CLK_BASE+0.112
pragma attribute SERDESIF_0 ment_tsu119 S_AWVALID_HWRITE->CLK_BASE+0.483
pragma attribute SERDESIF_0 ment_tsu120 S_BREADY_HREADY->CLK_BASE+0.563
pragma attribute SERDESIF_0 ment_tsu121 S_WDATA_HWDATA[0]->CLK_BASE+0.205
pragma attribute SERDESIF_0 ment_tsu122 S_WDATA_HWDATA[10]->CLK_BASE+0.254
pragma attribute SERDESIF_0 ment_tsu123 S_WDATA_HWDATA[11]->CLK_BASE+0.230
pragma attribute SERDESIF_0 ment_tsu124 S_WDATA_HWDATA[12]->CLK_BASE+0.194
pragma attribute SERDESIF_0 ment_tsu125 S_WDATA_HWDATA[13]->CLK_BASE+0.302
pragma attribute SERDESIF_0 ment_tsu126 S_WDATA_HWDATA[14]->CLK_BASE+0.220
pragma attribute SERDESIF_0 ment_tsu127 S_WDATA_HWDATA[15]->CLK_BASE+0.123
pragma attribute SERDESIF_0 ment_tsu128 S_WDATA_HWDATA[16]->CLK_BASE+0.333
pragma attribute SERDESIF_0 ment_tsu129 S_WDATA_HWDATA[17]->CLK_BASE+0.152
pragma attribute SERDESIF_0 ment_tsu130 S_WDATA_HWDATA[18]->CLK_BASE+0.252
pragma attribute SERDESIF_0 ment_tsu131 S_WDATA_HWDATA[19]->CLK_BASE+0.268
pragma attribute SERDESIF_0 ment_tsu132 S_WDATA_HWDATA[1]->CLK_BASE+0.182
pragma attribute SERDESIF_0 ment_tsu133 S_WDATA_HWDATA[20]->CLK_BASE+0.183
pragma attribute SERDESIF_0 ment_tsu134 S_WDATA_HWDATA[21]->CLK_BASE+0.213
pragma attribute SERDESIF_0 ment_tsu135 S_WDATA_HWDATA[22]->CLK_BASE+0.166
pragma attribute SERDESIF_0 ment_tsu136 S_WDATA_HWDATA[23]->CLK_BASE+0.185
pragma attribute SERDESIF_0 ment_tsu137 S_WDATA_HWDATA[24]->CLK_BASE+0.345
pragma attribute SERDESIF_0 ment_tsu138 S_WDATA_HWDATA[25]->CLK_BASE+0.305
pragma attribute SERDESIF_0 ment_tsu139 S_WDATA_HWDATA[26]->CLK_BASE+0.040
pragma attribute SERDESIF_0 ment_tsu140 S_WDATA_HWDATA[27]->CLK_BASE+0.121
pragma attribute SERDESIF_0 ment_tsu141 S_WDATA_HWDATA[28]->CLK_BASE+0.225
pragma attribute SERDESIF_0 ment_tsu142 S_WDATA_HWDATA[29]->CLK_BASE+0.023
pragma attribute SERDESIF_0 ment_tsu143 S_WDATA_HWDATA[2]->CLK_BASE+0.183
pragma attribute SERDESIF_0 ment_tsu144 S_WDATA_HWDATA[30]->CLK_BASE+0.201
pragma attribute SERDESIF_0 ment_tsu145 S_WDATA_HWDATA[31]->CLK_BASE+0.245
pragma attribute SERDESIF_0 ment_tsu146 S_WDATA_HWDATA[3]->CLK_BASE+0.195
pragma attribute SERDESIF_0 ment_tsu147 S_WDATA_HWDATA[4]->CLK_BASE+0.192
pragma attribute SERDESIF_0 ment_tsu148 S_WDATA_HWDATA[5]->CLK_BASE+0.117
pragma attribute SERDESIF_0 ment_tsu149 S_WDATA_HWDATA[6]->CLK_BASE+0.217
pragma attribute SERDESIF_0 ment_tsu150 S_WDATA_HWDATA[7]->CLK_BASE+0.144
pragma attribute SERDESIF_0 ment_tsu151 S_WDATA_HWDATA[8]->CLK_BASE+0.168
pragma attribute SERDESIF_0 ment_tsu152 S_WDATA_HWDATA[9]->CLK_BASE+0.183
pragma attribute SERDESIF_0 ment_tco0 APB_CLK->APB_PRDATA[0]+5.118
pragma attribute SERDESIF_0 ment_tco1 APB_CLK->APB_PRDATA[10]+4.443
pragma attribute SERDESIF_0 ment_tco2 APB_CLK->APB_PRDATA[11]+4.434
pragma attribute SERDESIF_0 ment_tco3 APB_CLK->APB_PRDATA[12]+4.433
pragma attribute SERDESIF_0 ment_tco4 APB_CLK->APB_PRDATA[13]+4.409
pragma attribute SERDESIF_0 ment_tco5 APB_CLK->APB_PRDATA[14]+4.407
pragma attribute SERDESIF_0 ment_tco6 APB_CLK->APB_PRDATA[15]+4.419
pragma attribute SERDESIF_0 ment_tco7 APB_CLK->APB_PRDATA[16]+4.423
pragma attribute SERDESIF_0 ment_tco8 APB_CLK->APB_PRDATA[17]+4.469
pragma attribute SERDESIF_0 ment_tco9 APB_CLK->APB_PRDATA[18]+4.438
pragma attribute SERDESIF_0 ment_tco10 APB_CLK->APB_PRDATA[19]+4.356
pragma attribute SERDESIF_0 ment_tco11 APB_CLK->APB_PRDATA[1]+5.053
pragma attribute SERDESIF_0 ment_tco12 APB_CLK->APB_PRDATA[20]+4.348
pragma attribute SERDESIF_0 ment_tco13 APB_CLK->APB_PRDATA[21]+4.716
pragma attribute SERDESIF_0 ment_tco14 APB_CLK->APB_PRDATA[22]+4.427
pragma attribute SERDESIF_0 ment_tco15 APB_CLK->APB_PRDATA[23]+4.654
pragma attribute SERDESIF_0 ment_tco16 APB_CLK->APB_PRDATA[24]+4.407
pragma attribute SERDESIF_0 ment_tco17 APB_CLK->APB_PRDATA[25]+4.369
pragma attribute SERDESIF_0 ment_tco18 APB_CLK->APB_PRDATA[26]+4.643
pragma attribute SERDESIF_0 ment_tco19 APB_CLK->APB_PRDATA[27]+4.484
pragma attribute SERDESIF_0 ment_tco20 APB_CLK->APB_PRDATA[28]+4.653
pragma attribute SERDESIF_0 ment_tco21 APB_CLK->APB_PRDATA[29]+4.235
pragma attribute SERDESIF_0 ment_tco22 APB_CLK->APB_PRDATA[2]+5.094
pragma attribute SERDESIF_0 ment_tco23 APB_CLK->APB_PRDATA[30]+4.499
pragma attribute SERDESIF_0 ment_tco24 APB_CLK->APB_PRDATA[31]+4.590
pragma attribute SERDESIF_0 ment_tco25 APB_CLK->APB_PRDATA[3]+4.851
pragma attribute SERDESIF_0 ment_tco26 APB_CLK->APB_PRDATA[4]+5.198
pragma attribute SERDESIF_0 ment_tco27 APB_CLK->APB_PRDATA[5]+5.068
pragma attribute SERDESIF_0 ment_tco28 APB_CLK->APB_PRDATA[6]+5.083
pragma attribute SERDESIF_0 ment_tco29 APB_CLK->APB_PRDATA[7]+5.613
pragma attribute SERDESIF_0 ment_tco30 APB_CLK->APB_PRDATA[8]+4.420
pragma attribute SERDESIF_0 ment_tco31 APB_CLK->APB_PRDATA[9]+4.416
pragma attribute SERDESIF_0 ment_tco32 APB_CLK->APB_PREADY+4.516
pragma attribute SERDESIF_0 ment_tco33 APB_CLK->PCIE_SYSTEM_INT+3.967
pragma attribute SERDESIF_0 ment_tco34 APB_CLK->PLL_LOCKLOST_INT+3.471
pragma attribute SERDESIF_0 ment_tco35 APB_CLK->PLL_LOCK_INT+3.213
pragma attribute SERDESIF_0 ment_tco36 CLK_BASE->M_AWADDR_HADDR[0]+3.742
pragma attribute SERDESIF_0 ment_tco37 CLK_BASE->M_AWADDR_HADDR[10]+3.604
pragma attribute SERDESIF_0 ment_tco38 CLK_BASE->M_AWADDR_HADDR[11]+3.402
pragma attribute SERDESIF_0 ment_tco39 CLK_BASE->M_AWADDR_HADDR[12]+3.446
pragma attribute SERDESIF_0 ment_tco40 CLK_BASE->M_AWADDR_HADDR[13]+3.466
pragma attribute SERDESIF_0 ment_tco41 CLK_BASE->M_AWADDR_HADDR[14]+3.738
pragma attribute SERDESIF_0 ment_tco42 CLK_BASE->M_AWADDR_HADDR[15]+3.420
pragma attribute SERDESIF_0 ment_tco43 CLK_BASE->M_AWADDR_HADDR[16]+3.506
pragma attribute SERDESIF_0 ment_tco44 CLK_BASE->M_AWADDR_HADDR[17]+3.246
pragma attribute SERDESIF_0 ment_tco45 CLK_BASE->M_AWADDR_HADDR[18]+3.504
pragma attribute SERDESIF_0 ment_tco46 CLK_BASE->M_AWADDR_HADDR[19]+3.365
pragma attribute SERDESIF_0 ment_tco47 CLK_BASE->M_AWADDR_HADDR[1]+3.749
pragma attribute SERDESIF_0 ment_tco48 CLK_BASE->M_AWADDR_HADDR[20]+3.524
pragma attribute SERDESIF_0 ment_tco49 CLK_BASE->M_AWADDR_HADDR[21]+3.435
pragma attribute SERDESIF_0 ment_tco50 CLK_BASE->M_AWADDR_HADDR[22]+3.451
pragma attribute SERDESIF_0 ment_tco51 CLK_BASE->M_AWADDR_HADDR[23]+3.487
pragma attribute SERDESIF_0 ment_tco52 CLK_BASE->M_AWADDR_HADDR[24]+3.272
pragma attribute SERDESIF_0 ment_tco53 CLK_BASE->M_AWADDR_HADDR[25]+3.425
pragma attribute SERDESIF_0 ment_tco54 CLK_BASE->M_AWADDR_HADDR[26]+3.228
pragma attribute SERDESIF_0 ment_tco55 CLK_BASE->M_AWADDR_HADDR[27]+3.438
pragma attribute SERDESIF_0 ment_tco56 CLK_BASE->M_AWADDR_HADDR[28]+3.538
pragma attribute SERDESIF_0 ment_tco57 CLK_BASE->M_AWADDR_HADDR[29]+3.411
pragma attribute SERDESIF_0 ment_tco58 CLK_BASE->M_AWADDR_HADDR[2]+3.628
pragma attribute SERDESIF_0 ment_tco59 CLK_BASE->M_AWADDR_HADDR[30]+3.245
pragma attribute SERDESIF_0 ment_tco60 CLK_BASE->M_AWADDR_HADDR[31]+3.260
pragma attribute SERDESIF_0 ment_tco61 CLK_BASE->M_AWADDR_HADDR[3]+3.656
pragma attribute SERDESIF_0 ment_tco62 CLK_BASE->M_AWADDR_HADDR[4]+3.424
pragma attribute SERDESIF_0 ment_tco63 CLK_BASE->M_AWADDR_HADDR[5]+3.678
pragma attribute SERDESIF_0 ment_tco64 CLK_BASE->M_AWADDR_HADDR[6]+3.590
pragma attribute SERDESIF_0 ment_tco65 CLK_BASE->M_AWADDR_HADDR[7]+3.396
pragma attribute SERDESIF_0 ment_tco66 CLK_BASE->M_AWADDR_HADDR[8]+3.454
pragma attribute SERDESIF_0 ment_tco67 CLK_BASE->M_AWADDR_HADDR[9]+3.396
pragma attribute SERDESIF_0 ment_tco68 CLK_BASE->M_AWBURST_HTRANS[0]+3.761
pragma attribute SERDESIF_0 ment_tco69 CLK_BASE->M_AWBURST_HTRANS[1]+3.748
pragma attribute SERDESIF_0 ment_tco70 CLK_BASE->M_AWLEN_HBURST[0]+3.242
pragma attribute SERDESIF_0 ment_tco71 CLK_BASE->M_AWLEN_HBURST[1]+3.458
pragma attribute SERDESIF_0 ment_tco72 CLK_BASE->M_AWLEN_HBURST[2]+3.279
pragma attribute SERDESIF_0 ment_tco73 CLK_BASE->M_AWSIZE_HSIZE[0]+3.574
pragma attribute SERDESIF_0 ment_tco74 CLK_BASE->M_AWSIZE_HSIZE[1]+3.482
pragma attribute SERDESIF_0 ment_tco75 CLK_BASE->M_AWVALID_HWRITE+3.485
pragma attribute SERDESIF_0 ment_tco76 CLK_BASE->M_WDATA_HWDATA[0]+3.886
pragma attribute SERDESIF_0 ment_tco77 CLK_BASE->M_WDATA_HWDATA[10]+3.429
pragma attribute SERDESIF_0 ment_tco78 CLK_BASE->M_WDATA_HWDATA[11]+3.449
pragma attribute SERDESIF_0 ment_tco79 CLK_BASE->M_WDATA_HWDATA[12]+3.442
pragma attribute SERDESIF_0 ment_tco80 CLK_BASE->M_WDATA_HWDATA[13]+3.690
pragma attribute SERDESIF_0 ment_tco81 CLK_BASE->M_WDATA_HWDATA[14]+3.645
pragma attribute SERDESIF_0 ment_tco82 CLK_BASE->M_WDATA_HWDATA[15]+3.515
pragma attribute SERDESIF_0 ment_tco83 CLK_BASE->M_WDATA_HWDATA[16]+3.649
pragma attribute SERDESIF_0 ment_tco84 CLK_BASE->M_WDATA_HWDATA[17]+3.770
pragma attribute SERDESIF_0 ment_tco85 CLK_BASE->M_WDATA_HWDATA[18]+3.653
pragma attribute SERDESIF_0 ment_tco86 CLK_BASE->M_WDATA_HWDATA[19]+3.550
pragma attribute SERDESIF_0 ment_tco87 CLK_BASE->M_WDATA_HWDATA[1]+3.667
pragma attribute SERDESIF_0 ment_tco88 CLK_BASE->M_WDATA_HWDATA[20]+3.653
pragma attribute SERDESIF_0 ment_tco89 CLK_BASE->M_WDATA_HWDATA[21]+3.752
pragma attribute SERDESIF_0 ment_tco90 CLK_BASE->M_WDATA_HWDATA[22]+3.628
pragma attribute SERDESIF_0 ment_tco91 CLK_BASE->M_WDATA_HWDATA[23]+3.534
pragma attribute SERDESIF_0 ment_tco92 CLK_BASE->M_WDATA_HWDATA[24]+3.518
pragma attribute SERDESIF_0 ment_tco93 CLK_BASE->M_WDATA_HWDATA[25]+3.706
pragma attribute SERDESIF_0 ment_tco94 CLK_BASE->M_WDATA_HWDATA[26]+3.648
pragma attribute SERDESIF_0 ment_tco95 CLK_BASE->M_WDATA_HWDATA[27]+3.367
pragma attribute SERDESIF_0 ment_tco96 CLK_BASE->M_WDATA_HWDATA[28]+3.653
pragma attribute SERDESIF_0 ment_tco97 CLK_BASE->M_WDATA_HWDATA[29]+3.699
pragma attribute SERDESIF_0 ment_tco98 CLK_BASE->M_WDATA_HWDATA[2]+3.596
pragma attribute SERDESIF_0 ment_tco99 CLK_BASE->M_WDATA_HWDATA[30]+3.499
pragma attribute SERDESIF_0 ment_tco100 CLK_BASE->M_WDATA_HWDATA[31]+3.699
pragma attribute SERDESIF_0 ment_tco101 CLK_BASE->M_WDATA_HWDATA[3]+3.405
pragma attribute SERDESIF_0 ment_tco102 CLK_BASE->M_WDATA_HWDATA[4]+3.649
pragma attribute SERDESIF_0 ment_tco103 CLK_BASE->M_WDATA_HWDATA[5]+3.781
pragma attribute SERDESIF_0 ment_tco104 CLK_BASE->M_WDATA_HWDATA[6]+3.783
pragma attribute SERDESIF_0 ment_tco105 CLK_BASE->M_WDATA_HWDATA[7]+3.780
pragma attribute SERDESIF_0 ment_tco106 CLK_BASE->M_WDATA_HWDATA[8]+3.342
pragma attribute SERDESIF_0 ment_tco107 CLK_BASE->M_WDATA_HWDATA[9]+3.579
pragma attribute SERDESIF_0 ment_tco108 CLK_BASE->S_BRESP_HRESP[0]+3.971
pragma attribute SERDESIF_0 ment_tco109 CLK_BASE->S_RDATA_HRDATA[0]+3.818
pragma attribute SERDESIF_0 ment_tco110 CLK_BASE->S_RDATA_HRDATA[10]+3.936
pragma attribute SERDESIF_0 ment_tco111 CLK_BASE->S_RDATA_HRDATA[11]+3.883
pragma attribute SERDESIF_0 ment_tco112 CLK_BASE->S_RDATA_HRDATA[12]+3.843
pragma attribute SERDESIF_0 ment_tco113 CLK_BASE->S_RDATA_HRDATA[13]+3.954
pragma attribute SERDESIF_0 ment_tco114 CLK_BASE->S_RDATA_HRDATA[14]+3.808
pragma attribute SERDESIF_0 ment_tco115 CLK_BASE->S_RDATA_HRDATA[15]+3.992
pragma attribute SERDESIF_0 ment_tco116 CLK_BASE->S_RDATA_HRDATA[16]+3.897
pragma attribute SERDESIF_0 ment_tco117 CLK_BASE->S_RDATA_HRDATA[17]+3.979
pragma attribute SERDESIF_0 ment_tco118 CLK_BASE->S_RDATA_HRDATA[18]+3.796
pragma attribute SERDESIF_0 ment_tco119 CLK_BASE->S_RDATA_HRDATA[19]+3.993
pragma attribute SERDESIF_0 ment_tco120 CLK_BASE->S_RDATA_HRDATA[1]+3.918
pragma attribute SERDESIF_0 ment_tco121 CLK_BASE->S_RDATA_HRDATA[20]+3.917
pragma attribute SERDESIF_0 ment_tco122 CLK_BASE->S_RDATA_HRDATA[21]+3.854
pragma attribute SERDESIF_0 ment_tco123 CLK_BASE->S_RDATA_HRDATA[22]+3.720
pragma attribute SERDESIF_0 ment_tco124 CLK_BASE->S_RDATA_HRDATA[23]+3.951
pragma attribute SERDESIF_0 ment_tco125 CLK_BASE->S_RDATA_HRDATA[24]+3.930
pragma attribute SERDESIF_0 ment_tco126 CLK_BASE->S_RDATA_HRDATA[25]+3.960
pragma attribute SERDESIF_0 ment_tco127 CLK_BASE->S_RDATA_HRDATA[26]+3.848
pragma attribute SERDESIF_0 ment_tco128 CLK_BASE->S_RDATA_HRDATA[27]+3.977
pragma attribute SERDESIF_0 ment_tco129 CLK_BASE->S_RDATA_HRDATA[28]+3.932
pragma attribute SERDESIF_0 ment_tco130 CLK_BASE->S_RDATA_HRDATA[29]+3.962
pragma attribute SERDESIF_0 ment_tco131 CLK_BASE->S_RDATA_HRDATA[2]+3.932
pragma attribute SERDESIF_0 ment_tco132 CLK_BASE->S_RDATA_HRDATA[30]+3.944
pragma attribute SERDESIF_0 ment_tco133 CLK_BASE->S_RDATA_HRDATA[31]+3.899
pragma attribute SERDESIF_0 ment_tco134 CLK_BASE->S_RDATA_HRDATA[3]+3.712
pragma attribute SERDESIF_0 ment_tco135 CLK_BASE->S_RDATA_HRDATA[4]+3.854
pragma attribute SERDESIF_0 ment_tco136 CLK_BASE->S_RDATA_HRDATA[5]+3.710
pragma attribute SERDESIF_0 ment_tco137 CLK_BASE->S_RDATA_HRDATA[6]+3.940
pragma attribute SERDESIF_0 ment_tco138 CLK_BASE->S_RDATA_HRDATA[7]+3.931
pragma attribute SERDESIF_0 ment_tco139 CLK_BASE->S_RDATA_HRDATA[8]+3.991
pragma attribute SERDESIF_0 ment_tco140 CLK_BASE->S_RDATA_HRDATA[9]+3.948
pragma attribute SERDESIF_0 ment_tco141 CLK_BASE->S_WREADY_HREADYOUT+3.935
*/
/* synthesis black_box black_box_pad ="RXD3_P,RXD2_P,RXD1_P,RXD0_P,RXD3_N,RXD2_N,RXD1_N,RXD0_N,TXD3_P,TXD2_P,TXD1_P,TXD0_P,TXD3_N,TXD2_N,TXD1_N,TXD0_N" */
 ;
output [31:0] APB_PRDATA;
output APB_PREADY;
output APB_PSLVERR;
output [1:0] ATXCLKSTABLE;
output [1:0] EPCS_READY;
output [1:0] EPCS_RXCLK;
output EPCS_RXCLK_0;
output EPCS_RXCLK_1;
output [39:0] EPCS_RXDATA;
output [1:0] EPCS_RXIDLE;
output [1:0] EPCS_RXRSTN;
output [1:0] EPCS_RXVAL;
output [1:0] EPCS_TXCLK;
output EPCS_TXCLK_0;
output EPCS_TXCLK_1;
output [1:0] EPCS_TXRSTN;
output FATC_RESET_N;
output H2FCALIB0;
output H2FCALIB1;
output [31:0] M_ARADDR;
output [1:0] M_ARBURST;
output [3:0] M_ARID;
output [3:0] M_ARLEN;
output [1:0] M_ARSIZE;
output M_ARVALID;
output [31:0] M_AWADDR_HADDR;
output [1:0] M_AWBURST_HTRANS;
output [3:0] M_AWID;
output [3:0] M_AWLEN_HBURST;
output [1:0] M_AWSIZE_HSIZE;
output M_AWVALID_HWRITE;
output M_BREADY;
output M_RREADY;
output [63:0] M_WDATA_HWDATA;
output [3:0] M_WID;
output M_WLAST;
output [7:0] M_WSTRB;
output M_WVALID;
output PCIE_SYSTEM_INT;
output PLL_LOCK_INT;
output PLL_LOCKLOST_INT;
output S_ARREADY;
output S_AWREADY;
output [3:0] S_BID;
output [1:0] S_BRESP_HRESP;
output S_BVALID;
output [63:0] S_RDATA_HRDATA;
output [3:0] S_RID;
output S_RLAST;
output [1:0] S_RRESP;
output S_RVALID;
output S_WREADY_HREADYOUT;
output SPLL_LOCK;
output WAKE_N;
output XAUI_OUT_CLK;
input  APB_CLK;
input  [13:2] APB_PADDR;
input  APB_PENABLE;
input  APB_PSEL;
input  [31:0] APB_PWDATA;
input  APB_PWRITE;
input  APB_RSTN;
input  CLK_BASE;
input  [1:0] EPCS_PWRDN;
input  [1:0] EPCS_RSTN;
input  [1:0] EPCS_RXERR;
input  [39:0] EPCS_TXDATA;
input  [1:0] EPCS_TXOOB;
input  [1:0] EPCS_TXVAL;
input  F2HCALIB0;
input  F2HCALIB1;
input  FAB_PLL_LOCK;
input  FAB_REF_CLK;
input  M_ARREADY;
input  M_AWREADY;
input  [3:0] M_BID;
input  [1:0] M_BRESP_HRESP;
input  M_BVALID;
input  [63:0] M_RDATA_HRDATA;
input  [3:0] M_RID;
input  M_RLAST;
input  [1:0] M_RRESP;
input  M_RVALID;
input  M_WREADY_HREADY;
input  [3:0] PCIE_INTERRUPT;
input  PERST_N;
input  [31:0] S_ARADDR;
input  [1:0] S_ARBURST;
input  [3:0] S_ARID;
input  [3:0] S_ARLEN;
input  [1:0] S_ARLOCK;
input  [1:0] S_ARSIZE;
input  S_ARVALID;
input  [31:0] S_AWADDR_HADDR;
input  [1:0] S_AWBURST_HTRANS;
input  [3:0] S_AWID_HSEL;
input  [3:0] S_AWLEN_HBURST;
input  [1:0] S_AWLOCK;
input  [1:0] S_AWSIZE_HSIZE;
input  S_AWVALID_HWRITE;
input  S_BREADY_HREADY;
input  S_RREADY;
input  [63:0] S_WDATA_HWDATA;
input  [3:0] S_WID;
input  S_WLAST;
input  [7:0] S_WSTRB;
input  S_WVALID;
input  SERDESIF_CORE_RESET_N;
input  SERDESIF_PHY_RESET_N;
input  WAKE_REQ;
input  XAUI_FB_CLK;
input  RXD3_P;
input  RXD2_P;
input  RXD1_P;
input  RXD0_P;
input  RXD3_N;
input  RXD2_N;
input  RXD1_N;
input  RXD0_N;
output TXD3_P;
output TXD2_P;
output TXD1_P;
output TXD0_P;
output TXD3_N;
output TXD2_N;
output TXD1_N;
output TXD0_N;
input  REFCLK0;
input  REFCLK1;
parameter INIT = 'h0;
parameter ACT_CONFIG = "";
parameter ACT_SIM = 0;

endmodule
