// Actel Corporation Proprietary and Confidential
// Copyright 2010 Actel Corporation.  All rights reserved.
// ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN
// ACCORDANCE WITH THE ACTEL LICENSE AGREEMENT AND MUST BE APPROVED
// IN ADVANCE IN WRITING.
// Revision Information:
// 10Feb10              Production Release Version 3.1
// SVN Revision Information:
// SVN $Revision: 21302 $
// SVN $Date: 2013-10-17 11:52:38 -0700 (Thu, 17 Oct 2013) $
`timescale 1ns/1ps
module
CAHBLTlOOI
#
(
parameter
[
2
:
0
]
MEMSPACE
=
0
,
parameter
[
0
:
0
]
HADDR_SHG_CFG
=
1
,
parameter
[
15
:
0
]
CAHBLTI
=
0
,
parameter
[
16
:
0
]
CAHBLTl
=
(
2
**
17
)
-
1
)
(
input
HCLK,
input
HRESETN,
input
[
31
:
0
]
CAHBLTOIOI,
input
CAHBLTIIOI,
input
[
2
:
0
]
CAHBLTlIOI,
input
CAHBLTOlOI,
input
CAHBLTIlOI,
output
reg
CAHBLTllOI,
output
reg
[
31
:
0
]
CAHBLTO0OI,
output
wire
CAHBLTI0OI,
input
CAHBLTII,
input
[
16
:
0
]
CAHBLTl0OI,
input
[
16
:
0
]
CAHBLTO1OI,
input
[
16
:
0
]
CAHBLTI1OI,
output
wire
[
31
:
0
]
CAHBLTl1OI,
output
reg
CAHBLTOOII,
output
reg
[
2
:
0
]
CAHBLTIOII,
output
reg
CAHBLTlOII,
output
reg
CAHBLTOIII,
output
wire
[
16
:
0
]
CAHBLTIIII,
output
wire
[
16
:
0
]
CAHBLTlIII,
output
reg
CAHBLTOlII,
input
[
31
:
0
]
HRDATA_S0,
input
HREADYOUT_S0,
input
[
31
:
0
]
HRDATA_S1,
input
HREADYOUT_S1,
input
[
31
:
0
]
HRDATA_S2,
input
HREADYOUT_S2,
input
[
31
:
0
]
HRDATA_S3,
input
HREADYOUT_S3,
input
[
31
:
0
]
HRDATA_S4,
input
HREADYOUT_S4,
input
[
31
:
0
]
HRDATA_S5,
input
HREADYOUT_S5,
input
[
31
:
0
]
HRDATA_S6,
input
HREADYOUT_S6,
input
[
31
:
0
]
HRDATA_S7,
input
HREADYOUT_S7,
input
[
31
:
0
]
HRDATA_S8,
input
HREADYOUT_S8,
input
[
31
:
0
]
HRDATA_S9,
input
HREADYOUT_S9,
input
[
31
:
0
]
HRDATA_S10,
input
HREADYOUT_S10,
input
[
31
:
0
]
HRDATA_S11,
input
HREADYOUT_S11,
input
[
31
:
0
]
HRDATA_S12,
input
HREADYOUT_S12,
input
[
31
:
0
]
HRDATA_S13,
input
HREADYOUT_S13,
input
[
31
:
0
]
HRDATA_S14,
input
HREADYOUT_S14,
input
[
31
:
0
]
HRDATA_S15,
input
HREADYOUT_S15,
input
[
31
:
0
]
HRDATA_S16,
input
HREADYOUT_S16
)
;
localparam
CAHBLTl0l
=
1
'b
0
;
localparam
CAHBLTIlII
=
1
'b
1
;
localparam
CAHBLTllII
=
17
'b
0_0000_0000_0000_0000
;
reg
[
31
:
0
]
CAHBLTO0II
;
reg
CAHBLTI0II
;
reg
CAHBLTl0II
;
reg
CAHBLTO1II
;
reg
[
31
:
0
]
CAHBLTI1II
;
reg
CAHBLTl1II
;
reg
[
2
:
0
]
CAHBLTOOlI
;
reg
CAHBLTIOlI
;
reg
CAHBLTlOlI
;
reg
CAHBLTOIlI
;
reg
CAHBLTIIlI
;
wire
[
16
:
0
]
CAHBLTlIlI
;
reg
[
16
:
0
]
CAHBLTOllI
;
reg
[
16
:
0
]
CAHBLTIllI
;
wire
CAHBLTO0l
;
wire
CAHBLTI0l
;
wire
CAHBLTlll
;
wire
CAHBLTlllI
;
wire
CAHBLTO0lI
;
wire
CAHBLTI0lI
;
wire
CAHBLTl0lI
;
wire
CAHBLTO1lI
;
wire
CAHBLTI1lI
;
wire
CAHBLTl1lI
;
wire
CAHBLTOO0I
;
wire
CAHBLTIO0I
;
wire
CAHBLTlO0I
;
wire
CAHBLTOI0I
;
wire
CAHBLTII0I
;
wire
CAHBLTlI0I
;
wire
CAHBLTOl0I
;
wire
CAHBLTIl0I
;
wire
CAHBLTll0I
;
wire
CAHBLTO00I
;
wire
CAHBLTI00I
;
reg
CAHBLTl00I
;
reg
CAHBLTO10I
;
reg
CAHBLTI10I
;
assign
CAHBLTIIII
=
CAHBLTOllI
[
16
:
0
]
;
assign
CAHBLTlIII
=
CAHBLTIllI
[
16
:
0
]
;
assign
CAHBLTlllI
=
(
CAHBLTIllI
[
0
]
&
(
!
CAHBLTl
[
0
]
)
)
;
assign
CAHBLTO0lI
=
(
CAHBLTIllI
[
1
]
&
(
!
CAHBLTl
[
1
]
)
)
;
assign
CAHBLTI0lI
=
(
CAHBLTIllI
[
2
]
&
(
!
CAHBLTl
[
2
]
)
)
;
assign
CAHBLTl0lI
=
(
CAHBLTIllI
[
3
]
&
(
!
CAHBLTl
[
3
]
)
)
;
assign
CAHBLTO1lI
=
(
CAHBLTIllI
[
4
]
&
(
!
CAHBLTl
[
4
]
)
)
;
assign
CAHBLTI1lI
=
(
CAHBLTIllI
[
5
]
&
(
!
CAHBLTl
[
5
]
)
)
;
assign
CAHBLTl1lI
=
(
CAHBLTIllI
[
6
]
&
(
!
CAHBLTl
[
6
]
)
)
;
assign
CAHBLTOO0I
=
(
CAHBLTIllI
[
7
]
&
(
!
CAHBLTl
[
7
]
)
)
;
assign
CAHBLTIO0I
=
(
CAHBLTIllI
[
8
]
&
(
!
CAHBLTl
[
8
]
)
)
;
assign
CAHBLTlO0I
=
(
CAHBLTIllI
[
9
]
&
(
!
CAHBLTl
[
9
]
)
)
;
assign
CAHBLTOI0I
=
(
CAHBLTIllI
[
10
]
&
(
!
CAHBLTl
[
10
]
)
)
;
assign
CAHBLTII0I
=
(
CAHBLTIllI
[
11
]
&
(
!
CAHBLTl
[
11
]
)
)
;
assign
CAHBLTlI0I
=
(
CAHBLTIllI
[
12
]
&
(
!
CAHBLTl
[
12
]
)
)
;
assign
CAHBLTOl0I
=
(
CAHBLTIllI
[
13
]
&
(
!
CAHBLTl
[
13
]
)
)
;
assign
CAHBLTIl0I
=
(
CAHBLTIllI
[
14
]
&
(
!
CAHBLTl
[
14
]
)
)
;
assign
CAHBLTll0I
=
(
CAHBLTIllI
[
15
]
&
(
!
CAHBLTl
[
15
]
)
)
;
assign
CAHBLTO00I
=
(
CAHBLTIllI
[
16
]
&
(
!
CAHBLTl
[
16
]
)
)
;
assign
CAHBLTlll
=
(
CAHBLTlllI
|
CAHBLTO0lI
|
CAHBLTI0lI
|
CAHBLTl0lI
|
CAHBLTO1lI
|
CAHBLTI1lI
|
CAHBLTl1lI
|
CAHBLTOO0I
|
CAHBLTIO0I
|
CAHBLTlO0I
|
CAHBLTOI0I
|
CAHBLTII0I
|
CAHBLTlI0I
|
CAHBLTOl0I
|
CAHBLTIl0I
|
CAHBLTll0I
|
CAHBLTO00I
|
CAHBLTO10I
)
;
always
@
(
posedge
HCLK
or
negedge
HRESETN
)
begin
if
(
!
HRESETN
)
begin
CAHBLTI1II
<=
32
'h
0
;
CAHBLTl1II
<=
1
'b
0
;
CAHBLTOOlI
<=
3
'b
0
;
CAHBLTIOlI
<=
1
'b
0
;
CAHBLTlOlI
<=
1
'b
0
;
end
else
begin
if
(
CAHBLTO1II
)
begin
CAHBLTI1II
<=
CAHBLTOIOI
;
CAHBLTl1II
<=
CAHBLTIIOI
;
CAHBLTOOlI
<=
CAHBLTlIOI
;
CAHBLTIOlI
<=
CAHBLTOlOI
;
CAHBLTlOlI
<=
CAHBLTIlOI
;
end
end
end
always
@(*)
begin
if
(
CAHBLTI0II
==
1
'b
0
)
begin
CAHBLTO0II
=
CAHBLTOIOI
;
CAHBLTOOII
=
CAHBLTIIOI
;
CAHBLTIOII
=
CAHBLTlIOI
;
CAHBLTlOII
=
CAHBLTOlOI
;
CAHBLTOIII
=
CAHBLTIlOI
;
end
else
begin
CAHBLTO0II
=
CAHBLTI1II
;
CAHBLTOOII
=
CAHBLTl1II
;
CAHBLTIOII
=
CAHBLTOOlI
;
CAHBLTlOII
=
CAHBLTIOlI
;
CAHBLTOIII
=
CAHBLTlOlI
;
end
end
CAHBLTO
#
(
.MEMSPACE
(
MEMSPACE
)
,
.HADDR_SHG_CFG
(
HADDR_SHG_CFG
)
,
.CAHBLTI
(
CAHBLTI
)
,
.CAHBLTl
(
CAHBLTl
)
)
CAHBLTl10I
(
.CAHBLTOI
(
CAHBLTO0II
)
,
.CAHBLTII
(
CAHBLTII
)
,
.CAHBLTlI
(
CAHBLTlIlI
[
16
:
0
]
)
,
.CAHBLTOl
(
CAHBLTl1OI
[
31
:
0
]
)
,
.CAHBLTIl
(
CAHBLTI00I
)
)
;
always
@(*)
begin
if
(
CAHBLTlOII
)
begin
CAHBLTOllI
=
CAHBLTlIlI
;
CAHBLTl00I
=
CAHBLTI00I
;
end
else
begin
CAHBLTOllI
=
CAHBLTllII
;
CAHBLTl00I
=
1
'b
0
;
end
end
always
@
(
posedge
HCLK
or
negedge
HRESETN
)
begin
if
(
!
HRESETN
)
CAHBLTIllI
<=
CAHBLTllII
;
else
if
(
CAHBLTOlII
)
CAHBLTIllI
<=
CAHBLTOllI
;
end
always
@
(
posedge
HCLK
or
negedge
HRESETN
)
begin
if
(
!
HRESETN
)
begin
CAHBLTO10I
<=
1
'b
0
;
end
else
if
(
CAHBLTOlII
)
begin
CAHBLTO10I
<=
CAHBLTl00I
;
end
end
always
@(*)
begin
if
(
CAHBLTO10I
)
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
else
casez
(
CAHBLTIllI
[
16
:
0
]
)
17
'b
????????????????1
:
begin
if
(
CAHBLTl
[
0
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
0
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
0
]
;
CAHBLTO0OI
=
HRDATA_S0
;
CAHBLTOlII
=
HREADYOUT_S0
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
???????????????1?
:
begin
if
(
CAHBLTl
[
1
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
1
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
1
]
;
CAHBLTO0OI
=
HRDATA_S1
;
CAHBLTOlII
=
HREADYOUT_S1
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
??????????????1??
:
begin
if
(
CAHBLTl
[
2
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
2
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
2
]
;
CAHBLTO0OI
=
HRDATA_S2
;
CAHBLTOlII
=
HREADYOUT_S2
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
?????????????1???
:
begin
if
(
CAHBLTl
[
3
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
3
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
3
]
;
CAHBLTO0OI
=
HRDATA_S3
;
CAHBLTOlII
=
HREADYOUT_S3
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
????????????1????
:
begin
if
(
CAHBLTl
[
4
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
4
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
4
]
;
CAHBLTO0OI
=
HRDATA_S4
;
CAHBLTOlII
=
HREADYOUT_S4
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
???????????1?????
:
begin
if
(
CAHBLTl
[
5
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
5
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
5
]
;
CAHBLTO0OI
=
HRDATA_S5
;
CAHBLTOlII
=
HREADYOUT_S5
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
??????????1??????
:
begin
if
(
CAHBLTl
[
6
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
6
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
6
]
;
CAHBLTO0OI
=
HRDATA_S6
;
CAHBLTOlII
=
HREADYOUT_S6
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
?????????1???????
:
begin
if
(
CAHBLTl
[
7
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
7
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
7
]
;
CAHBLTO0OI
=
HRDATA_S7
;
CAHBLTOlII
=
HREADYOUT_S7
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
????????1????????
:
begin
if
(
CAHBLTl
[
8
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
8
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
8
]
;
CAHBLTO0OI
=
HRDATA_S8
;
CAHBLTOlII
=
HREADYOUT_S8
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
???????1?????????
:
begin
if
(
CAHBLTl
[
9
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
9
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
9
]
;
CAHBLTO0OI
=
HRDATA_S9
;
CAHBLTOlII
=
HREADYOUT_S9
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
??????1??????????
:
begin
if
(
CAHBLTl
[
10
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
10
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
10
]
;
CAHBLTO0OI
=
HRDATA_S10
;
CAHBLTOlII
=
HREADYOUT_S10
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
?????1???????????
:
begin
if
(
CAHBLTl
[
11
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
11
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
11
]
;
CAHBLTO0OI
=
HRDATA_S11
;
CAHBLTOlII
=
HREADYOUT_S11
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
????1????????????
:
begin
if
(
CAHBLTl
[
12
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
12
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
12
]
;
CAHBLTO0OI
=
HRDATA_S12
;
CAHBLTOlII
=
HREADYOUT_S12
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
???1?????????????
:
begin
if
(
CAHBLTl
[
13
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
13
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
13
]
;
CAHBLTO0OI
=
HRDATA_S13
;
CAHBLTOlII
=
HREADYOUT_S13
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
??1??????????????
:
begin
if
(
CAHBLTl
[
14
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
14
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
14
]
;
CAHBLTO0OI
=
HRDATA_S14
;
CAHBLTOlII
=
HREADYOUT_S14
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
?1???????????????
:
begin
if
(
CAHBLTl
[
15
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
15
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
15
]
;
CAHBLTO0OI
=
HRDATA_S15
;
CAHBLTOlII
=
HREADYOUT_S15
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
17
'b
1????????????????
:
begin
if
(
CAHBLTl
[
16
]
)
begin
CAHBLTI10I
=
CAHBLTO1OI
[
16
]
;
CAHBLTllOI
=
CAHBLTI1OI
[
16
]
;
CAHBLTO0OI
=
HRDATA_S16
;
CAHBLTOlII
=
HREADYOUT_S16
;
end
else
begin
CAHBLTI10I
=
CAHBLTO0l
;
CAHBLTllOI
=
CAHBLTI0l
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
CAHBLTO0l
;
end
end
default
:
begin
CAHBLTI10I
=
1
'b
1
;
CAHBLTllOI
=
1
'b
0
;
CAHBLTO0OI
=
32
'h
0
;
CAHBLTOlII
=
1
'b
1
;
end
endcase
end
always
@(*)
begin
CAHBLTO1II
=
1
'b
0
;
CAHBLTl0II
=
1
'b
0
;
case
(
CAHBLTOIlI
)
CAHBLTl0l
:
begin
if
(
CAHBLTOlOI
&&
CAHBLTI0OI
&&
(
(
CAHBLTlIlI
[
0
]
&&
!
CAHBLTl0OI
[
0
]
)
||
(
CAHBLTlIlI
[
1
]
&&
!
CAHBLTl0OI
[
1
]
)
||
(
CAHBLTlIlI
[
2
]
&&
!
CAHBLTl0OI
[
2
]
)
||
(
CAHBLTlIlI
[
3
]
&&
!
CAHBLTl0OI
[
3
]
)
||
(
CAHBLTlIlI
[
4
]
&&
!
CAHBLTl0OI
[
4
]
)
||
(
CAHBLTlIlI
[
5
]
&&
!
CAHBLTl0OI
[
5
]
)
||
(
CAHBLTlIlI
[
6
]
&&
!
CAHBLTl0OI
[
6
]
)
||
(
CAHBLTlIlI
[
7
]
&&
!
CAHBLTl0OI
[
7
]
)
||
(
CAHBLTlIlI
[
8
]
&&
!
CAHBLTl0OI
[
8
]
)
||
(
CAHBLTlIlI
[
9
]
&&
!
CAHBLTl0OI
[
9
]
)
||
(
CAHBLTlIlI
[
10
]
&&
!
CAHBLTl0OI
[
10
]
)
||
(
CAHBLTlIlI
[
11
]
&&
!
CAHBLTl0OI
[
11
]
)
||
(
CAHBLTlIlI
[
12
]
&&
!
CAHBLTl0OI
[
12
]
)
||
(
CAHBLTlIlI
[
13
]
&&
!
CAHBLTl0OI
[
13
]
)
||
(
CAHBLTlIlI
[
14
]
&&
!
CAHBLTl0OI
[
14
]
)
||
(
CAHBLTlIlI
[
15
]
&&
!
CAHBLTl0OI
[
15
]
)
||
(
CAHBLTlIlI
[
16
]
&&
!
CAHBLTl0OI
[
16
]
)
)
)
begin
CAHBLTO1II
=
1
'b
1
;
CAHBLTl0II
=
1
'b
1
;
CAHBLTIIlI
=
CAHBLTIlII
;
end
else
CAHBLTIIlI
=
CAHBLTl0l
;
end
CAHBLTIlII
:
begin
if
(
(
CAHBLTlIlI
[
0
]
&&
CAHBLTl0OI
[
0
]
)
||
(
CAHBLTlIlI
[
1
]
&&
CAHBLTl0OI
[
1
]
)
||
(
CAHBLTlIlI
[
2
]
&&
CAHBLTl0OI
[
2
]
)
||
(
CAHBLTlIlI
[
3
]
&&
CAHBLTl0OI
[
3
]
)
||
(
CAHBLTlIlI
[
4
]
&&
CAHBLTl0OI
[
4
]
)
||
(
CAHBLTlIlI
[
5
]
&&
CAHBLTl0OI
[
5
]
)
||
(
CAHBLTlIlI
[
6
]
&&
CAHBLTl0OI
[
6
]
)
||
(
CAHBLTlIlI
[
7
]
&&
CAHBLTl0OI
[
7
]
)
||
(
CAHBLTlIlI
[
8
]
&&
CAHBLTl0OI
[
8
]
)
||
(
CAHBLTlIlI
[
9
]
&&
CAHBLTl0OI
[
9
]
)
||
(
CAHBLTlIlI
[
10
]
&&
CAHBLTl0OI
[
10
]
)
||
(
CAHBLTlIlI
[
11
]
&&
CAHBLTl0OI
[
11
]
)
||
(
CAHBLTlIlI
[
12
]
&&
CAHBLTl0OI
[
12
]
)
||
(
CAHBLTlIlI
[
13
]
&&
CAHBLTl0OI
[
13
]
)
||
(
CAHBLTlIlI
[
14
]
&&
CAHBLTl0OI
[
14
]
)
||
(
CAHBLTlIlI
[
15
]
&&
CAHBLTl0OI
[
15
]
)
||
(
CAHBLTlIlI
[
16
]
&&
CAHBLTl0OI
[
16
]
)
)
CAHBLTIIlI
=
CAHBLTl0l
;
else
begin
CAHBLTl0II
=
1
'b
1
;
CAHBLTIIlI
=
CAHBLTIlII
;
end
end
default
:
CAHBLTIIlI
=
CAHBLTl0l
;
endcase
end
always
@
(
posedge
HCLK
or
negedge
HRESETN
)
begin
if
(
!
HRESETN
)
begin
CAHBLTOIlI
<=
CAHBLTl0l
;
CAHBLTI0II
<=
1
'b
0
;
end
else
begin
CAHBLTOIlI
<=
CAHBLTIIlI
;
CAHBLTI0II
<=
CAHBLTl0II
;
end
end
CAHBLTIll
CAHBLTOO1I
(
.HCLK
(
HCLK
)
,
.HRESETN
(
HRESETN
)
,
.CAHBLTlll
(
CAHBLTlll
)
,
.CAHBLTO0l
(
CAHBLTO0l
)
,
.CAHBLTI0l
(
CAHBLTI0l
)
)
;
assign
CAHBLTI0OI
=
CAHBLTI10I
;
endmodule
